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PDF ATINY26 Data sheet ( Hoja de datos )
| Número de pieza | ATINY26 | |
| Descripción | 8-Bit Microcontroller | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• High-performance, Low-power AVR ® 8-bit Microcontroller
• RISC Architecture
– 118 Powerful Instructions – Most Single Clock Cycle Execution
– 32 x 8 General Purpose Working Registers
– Fully Static Operation
– Up to 16 MIPS Throughput at 16 MHz
• Data and Non-volatile Program Memory
– 2K Bytes of In-System Programmable Program Memory Flash
Endurance: 10,000 Write/Erase Cycles
– 128 Bytes of In-System Programmable EEPROM
Endurance: 100,000 Write/Erase Cycles
– 128 Bytes Internal SRAM
– Programming Lock for Flash Program and EEPROM Data Security
www.Data•ShPeeetr4ipUh.ceormal Features
– 8-bit Timer/Counter with Separate Prescaler
– 8-bit High-speed Timer with Separate Prescaler
2 High Frequency PWM Outputs with Separate Output Compare Registers
Non-overlapping Inverted PWM Output Pins
– Universal Serial Interface with Start Condition Detector
– 10-bit ADC
11 Single Ended Channels
8 Differential ADC Channels
7 Differential ADC Channel Pairs with Programmable Gain (1x, 20x)
– On-chip Analog Comparator
– External Interrupt
– Pin Change Interrupt on 11 Pins
– Programmable Watchdog Timer with Separate On-chip Oscillator
• Special Microcontroller Features
– Low Power Idle, Noise Reduction, and Power-down Modes
– Power-on Reset and Programmable Brown-out Detection
– External and Internal Interrupt Sources
– In-System Programmable via SPI Port
– Internal Calibrated RC Oscillator
• I/O and Packages
– 20-lead PDIP/SOIC: 16 Programmable I/O Lines
• Operating Voltages
– 2.7V - 5.5V for ATtiny26L
– 4.5V - 5.5V for ATtiny26
• Speed Grades
– 0 - 8 MHz for ATtiny26L
– 0 - 16 MHz for ATtiny26
8-bit
Microcontroller
with 2K Bytes
Flash
ATtiny26
ATtiny26L
Preliminary
Rev. 1477D–AVR–06/03
1
1 page  
Pin Descriptions
VCC
GND
AVCC
Port A (PA7..PA0)
www.DataSheet4U.com
Port B (PB7..PB0)
XTAL1
XTAL2
ATtiny26(L)
Digital supply voltage pin.
Digital ground pin.
AVCC is the supply voltage pin for Port A and the A/D Converter (ADC). It should be
externally connected to VCC, even if the ADC is not used. If the ADC is used, it should be
connected to VCC through a low-pass filter. See page 77 for details on operating of the
ADC.
Port A is an 8-bit general purpose I/O port. PA7..PA0 are all I/O pins that can provide
internal pull-ups (selected for each bit). Port A has alternate functions as analog inputs
for the ADC and analog comparator and pin change interrupt as described in “Alternate
Port Functions” on page 95.
Port B is an 8-bit general purpose I/O port. PB6..0 are all I/O pins that can provide inter-
nal pull-ups (selected for each bit). PB7 is an I/O pin if not used as the reset. To use pin
PB7 as an I/O pin, instead of RESET pin, program (“0”) RSTDISBL Fuse. Port B has
alternate functions for the ADC, clocking, timer counters, USI, SPI programming, and
pin change interrupt as described in “Alternate Port Functions” on page 95.
An External Reset is generated by a low level on the PB7/RESET pin. Reset pulses
longer than 50 ns will generate a reset, even if the clock is not running. Shorter pulses
are not guaranteed to generate a reset.
Input to the inverting oscillator amplifier and input to the internal clock operating circuit.
Output from the inverting oscillator amplifier.
1477D–AVR–06/03
5
5 Page 
I/O Direct
Figure 8. I/O Direct Addressing
ATtiny26(L)
www.DataSheet4U.com
Data Direct
Operand address is contained in 6 bits of the instruction word. n is the destination or
source register address.
Figure 9. Direct Data Addressing
31
20 19
16
OP Rr/Rd
16 LSBs
15
0
Data Space
$0000
Data Indirect with
Displacement
1477D–AVR–06/03
$00DF
A 16-bit Data Address is contained in the 16 LSBs of a two-word instruction. Rd/Rr
specify the destination or source register.
Figure 10. Data Indirect with Displacement
15
Y OR Z - REGISTER
0
Data Space
$0000
15
OP
10
n
65 0
a
$00DF
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet ATINY26.PDF ] | |
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