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PDF R8A66161DD Data sheet ( Hoja de datos )
| Número de pieza | R8A66161DD | |
| Descripción | 16-BIT LED DRIVER | |
| Fabricantes | Renesas Technology | |
| Logotipo |  |
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R8A66161DD/SP
16-BIT LED DRIVER WITH SHIFT REGISTER AND LATCH
REJ03F0262-0100
Rev. 1.00
Jan. 16. 2008
DESCRIPTION
R8A66161 is a LED array driver having a 16-bit serial input and parallel output shift register function with
direct coupled reset input and output latch function.
This product guarantees the output current of 24mA (Vcc =5V case) which is sufficient for anode common
LED drive, capable of following 16-bits continuously at the same time. Parallel output is open drain output.
In addition, as this product has been designed in complete CMOS, power consumption can be greatly
reduced when compared with conventional BIPOLAR or Bi-CMOS products. Furthermore, pin layout ensures
the realization of an easy printed circuit. R8A66161 is the succession product of M66311.
www.DataSheetF4UE.cAomTURES
● Anode common LED drive
● VCC 5V or 3.3V single power supply
● High output current: all parallel outputs QA~ QP IOL=24mA (at VCC =5.0V) IOL=12mA (at VCC =3.3V)
simultaneous lighting available
● Low power dissipation: 100uW/package (max) (VCC=5.0V, Ta=25 , quiescent state)
● High noise margin: Schmitt input circuit provides responsiveness to a long line length
● Equipped with direct-coupled reset
● Open drain output: (except serial data output SQP)
● Wide operating temperature range: Ta=-40oC~+85oC
● Pin layout facilitates printed circuit wiring. (This layout facilitates cascade connection and LED connection)
APPLICATION
● LED array drive, The various LED display modules
● PPC, Printer, VCR, Mini-compo, Button-Telephone etc. All of LED display equipment
BLOCK DIAGRAM
LOGIC DIAGRAM
PARALLEL DATA OUTPUTS
QA QB QC QD QE QF QG QH QI QJ QK QL QM QN QO QP
1 2 24 23 22 21 20 19 18 17 16 15 14 13 11 12
SERIAL
DATA
OUTPUT
SQP Vcc
10 3
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
Q
CK
DS
54
OE A
ENABLE SERIAL
INPUT DATA
INPUT
DATA signal
OE signal
PARALLEL
DATA
OUTPUTS
QA QP
OUTPUT FORMAT
SERIAL
DATA
OUTPUT
SQP
8 76 9
CKS R CKL GND
SHIFT DIRECTLATCH
CLOCK RESET CLOCK
INPUT INPUT INPUT
REJ03F0262-0100 Rev.1.00 Jan.16.2008
page 1 of 7
1 page  
R8A66161DD/SP
SWITCHING CHARACTERISTICS (Ta=-40~+85oC,Vcc=5.0V or 3.3V)
Symbol
Parameter
fmax
tPLH
tPHL
tPHL
tPLZ
tPZL
tPLZ
tPZL
www.DataSheet4U.com
tPLZ
CI
Maximum clock frequency
Output “L”-“H” and “H”-“L”
propagation time
Output “H”-“L”
propagation time
Output “L”-“Z”
propagation time
Output “Z”-“L”
propagation time
Output “L”-“Z”
propagation time
Output “Z”-“L”
propagation time
Output “L”-“Z”
propagation time
Input capacitance
CKS - SQP
R – SQP
R - QA ~ QP
(turned off)
CKL - QA ~ QP
(turned on)
CKL - QA ~ QP
(turned off)
OE - QA ~ QP
(turned on)
OE - QA ~ QP
(turned off)
Test
conditions
5.0V specification
Min. Typ. Max.
4
125
125
125
3.3V specification
Min. Typ. Max.
3.3
150
150
150
Unit
MHz
ns
ns
ns
CL=50pF
RL=1KΩ
(Note 4)
200 220 ns
125 150 ns
200 220 ns
125 150 ns
200 220 ns
10 10 pF
TIMING REQUIREMENTS (Ta=-40~+85oC,Vcc=5.0V or 3.3V)
Symbol
tw
tsu
tsu
th
trec
Parameter
CKS, CKL, R pulse width
A setup time with respect to CKS
CKS setup time with respect to CKL
A hold time with respect to CKS
R recovery time with respect to CKS, CKL
Test
conditions
(Note 4)
5.0V specification
Min. Typ. Max.
125
125
125
15
70
3.3V specification
Min. Typ. Max.
150
150
150
20
80
Unit
ns
ns
ns
ns
ns
Note 4 : Test Circuit
PG
INPUT VCC
DUT
50 GND
SQP
CL
VCC
RL
QA QP
CL
(1) The pulse generator (PG) has the following characteristics (10%~90%). :tr = 6ns, tf = 6ns.
(2) The capacitance CL includes stray wiring capacitance and the probe input capacitance.
REJ03F0262-0100 Rev.1.00 Jan.16.2008
page 5 of 7
5 Page | ||
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| PDF Descargar | [ Datasheet R8A66161DD.PDF ] | |
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