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PDF ATR2434 Data sheet ( Hoja de datos )
| Número de pieza | ATR2434 | |
| Descripción | WirelessUSB 2.4-GHz DSSS Radio SoC | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• 2.4-GHz Radio Transceiver
• Operates in the Unlicensed Industrial, Scientific, and Medical (ISM) Band
(2.4 GHz to 2.483 GHz)
• -95 dBm Reception Sensitivity
• Up to 0 dBm Output Power
• Range of up to 50 Meters or More
• Data Throughput of up to 62.5 kbits/s
• Highly Integrated, Low Cost, Minimal Number of External Components Required
• Dual DSSS Reconfigurable Baseband Correlators
• SPI Microcontroller Interface (up to 2-MHz Data Rate)
• 13-MHz Input Clock Operation
• Low Standby Current < 1 µA
• Integrated 32-bit Manufacturing ID
• Operating Voltage from 2.7 V to 3.6 V
• Operating Temperature from -40°C to +85°C
• Offered in a Small Footprint QFN48 Package
Applications
• PC Human Interface Devices
– Mice
– Keyboards
– Joysticks
• Peripheral Gaming Devices
– Game Controllers
– Console Keyboards
• General
– Presenter Tools
– Remote Controls
– Consumer Electronics
– Barcode Scanners
– POS Peripherals
– Toys
WirelessUSB™
2.4-GHz DSSS
Radio SoC
ATR2434
Preliminary
Functional Description
The ATR2434 transceiver is a single-chip 2.4-GHz Direct Sequence Spread Spectrum
(DSSS) Gaussian Frequency Shift Keying (GFSK) baseband modem radio that con-
nects directly to a microcontroller.
Rev. 4822C–ISM–09/04
1 page  
ATR2434 [Preliminary]
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32 Chips/Bit Dual Channel
32 Chips/Bit Single Channel
2 × Oversampled
32 Chips/Bit Single Channel
Dual Data Rate (DDR)
Serializer/Deserializer
(SERDES)
Application Interfaces
Clocking and Power
Management
The baseband supports two non-simultaneous data streams each operating at
31.25 kbits/s.
The baseband supports a single data stream operating at 31.25 kbits/s that is sampled
twice as much as the other modes. The advantage of selecting this mode is its ability to
tolerate a noisy environment.
The baseband spreads bits in pairs and supports a single data stream operating at
62.5 kbits/s.
The ATR2434 provides a data Serializer/Deserializer (SERDES), which provides
byte-level framing of transmit and receive data. Bytes for transmission are loaded into
the SERDES and receive bytes are read from the SERDES via the SPI interface. The
SERDES provides double buffering of transmit and receive data. While one byte is
being transmitted by the radio the next byte can be written to the SERDES data register
insuring there are no breaks in transmitted data.
After a receive byte has been received it is loaded into the SERDES data register and
can be read at any time until the next byte is received, at which time the old contents of
the SERDES data register will be overwritten.
The ATR2434 has a fully synchronous SPI slave interface for connectivity to the applica-
tion MCU. Configuration and byte-oriented data transfer can be performed over this
interface. An interrupt is provided to trigger real time events.
An optional SERDES Bypass mode (DIO) is provided for applications that require a syn-
chronous serial bit-oriented data path. This interface is for data only.
A 13-MHz crystal is directly connected to X13IN and X13 without the need for external
capacitors. The ATR2434 has a programmable trim capability for adjusting the on-chip
load capacitance supplied to the crystal. The Radio Frequency (RF) circuitry has on-
chip decoupling capacitors. The ATR2434 is powered from a 2.7 V to 3.6 V DC supply.
The ATR2434 can be shutdown to a fully static state using the PD pin.
Below are the requirements for the crystal to be directly connected to X13IN and X13:
• Nominal frequency: 13 MHz
• Operating mode: fundamental mode
• Resonance mode: parallel resonant
• Frequency stability: ±30 ppm
• Series resistance: ≤ 100 Ω
• Load capacitance: 10 pF
• Drive level: 10 µW to 100 µW
4822C–ISM–09/04
5
5 Page 
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Table 3. Revision ID Register
Addr: 0x00
76
Silicon ID
5
ATR2434 [Preliminary]
REG_ID
43
Default: 0x07
210
Product ID
Bit Name
7:4 Silicon ID
3:0 Product ID
Description
These are the Silicon ID revision bits. 0000 = Rev A, 0001 = Rev B, etc. These bits are read-only.
These are the Product ID revision bits. Fixed at value 0111. These bits are read-only.
Table 4. Synthesizer A Counter
Addr: 0x01
76
Reserved
5
REG_SYN_A_CNT
43
2
Count
Default: 0x00
10
Bit Name
Description
7:5 Reserved These bits are reserved and should be written with zeros.
4:0 Count
The Synthesizer A Counter register is used for diagnostic purposes and is not recommended for normal
operation. The Channel register is the recommended method of setting the Synthesizer frequency.
The Synthesizer A Count along with the Synthesizer N Count can be used to generate the Synthesizer frequency.
The range of valid values of the Synthesizer A Count is 0 through 31. Using the Synthesizer A and N Count
register is an alternative to using the Channel register. Selection between the use of the Channel register or the A
and N registers is done through the Channel register (Reg 0x21, bit 7). When in Channel mode the A and N Count
bits can be used to read the A and N values derived directly from the Channel.
Table 5. Synthesizer N Counter
Addr: 0x02
76
Reserved
5
REG_SYN_N_CNT
43
Count
2
Default: 0x00
10
Bit Name
7 Reserved
6:0 Count
Description
This bit is reserved and should be written with zero.
The Synthesizer N Counter register is used for diagnostic purposes and therefore is not recommended for normal
operation. The Channel register is the recommended method of setting the Synthesizer frequency.
The Synthesizer N Count along with the Synthesizer A Count can be used to generate the Synthesizer frequency.
The range of valid values of the Synthesizer N Count is 74 through 76. Using the Synthesizer A and N Count
register is an alternative to using the Channel register. Selection between the use of the Channel register or the A
and N registers is done through the Channel register (Reg 0x21, bit 7). When in Channel mode the A and N
Count bits can be used to read the A and N values derived directly from the Channel.
4822C–ISM–09/04
11
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| PDF Descargar | [ Datasheet ATR2434.PDF ] | |
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