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PDF ATR2731 Data sheet ( Hoja de datos )
| Número de pieza | ATR2731 | |
| Descripción | DAB One-chip Front End | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• 8.5V Supply Voltage
• Voltage Regulator for Stable Operating Conditions
• Microprocessor-controlled Via a Simple Two-wire Bus
• Two Selectable Addresses
• Gain-controlled RF Amplifier with Two Inputs, Selectable Via a Simple Two-wire Bus
Control
• Balanced RF Amplifier Inputs
• Gain-controlled RF Mixer
• Four-pin Voltage-controlled Oscillator
• SAW Filter Driver With Differential Low-impedance Output
• AGC Voltage Generation for RF Section, Available at Charge-pump Output (Can Also
Be Used to Control a PIN Diode Attenuator)
• Gain-controlled IF Amplifier
• Balanced IF Amplifier Inputs
• Selectable Gain-controlled IF Mixer
• Single-ended IF Output
• AGC Voltage Generation for IF Section, Available at Charge-pump Output
• Separate Differential Input for the IF AGC Block
• All AGC Time Constants are Adjustable
• AGC Thresholds Programmable Via a Simple Two-wire Bus
• Three AGC Charge Pump Currents Selectable (Zero, Low, High)
• Reference Oscillator
• Programmable 9-bit Reference Divider
• Programmable 15-bit Counter 1:2048 to 1:32767 Effectively
• Tri-state Phase Detector with Programmable Charge Pump
• Superior Phase-noise Performance
• Programmable Deactivation of Tuning Output
• Three Switching Outputs (Open Collector)
• Three D/A Converters (Resolution: 8 Bits)
• Lock Status Indication (Open Collector)
DAB One-chip
Front End
ATR2731
Rev. 4904A–DAB–03/06
1 page  
Table 2-1. Pin Description
Piwnww.DataSShyemet4bUo.lcomFunction
1 SCL Clock (simple two-wire bus)
2 SDA Data (simple two-wire bus)
3 SWA Switching output (open collector)
4 SWB Switching output (open collector)
5 FREF Reference frequency output (for ATR2731)
6 SWC Switching output (open collector)
7 CAO Output of D/A converter A
8 CCO Output of D/A converter B
9 CBO Output of D/A converter C
10 GND Ground
11 GND Ground
12 RFA1 Input 1 of RF amplifier A (differential)
13 RFA2 Input 2 of RF amplifier A (differential)
14 RFB1 Input 1 of RF amplifier B (differential)
15 RFB2 Input 2 of RF amplifier B (differential)
16 CPRF Charge-pump output (RF AGC block)
17 GND Ground
18 SAW1 SAW driver output 1 (differential)
19 SAW2 SAW driver output 2 (differential)
20 VS Supply voltage RF part
21 SLI AGC mode selection (charge-pump current high)
22 WAGC AGC mode selection (charge-pump current off)
23 IFIN2 Input 2 of IF amplifier (differential)
24 IFIN1 Input 1 of IF amplifier (differential)
25 VS Supply voltage IF part
26 IFAGCIN2 Input 2 of IF AGC block (differential)
27 IFAGCIN1 Input 1 of IF AGC block (differential)
28 CPIF Charge-pump output (IF AGC block)
29 IFOUT IF output (single ended)
30 GND Ground
31 GND Ground
32 C1VC Collector 1 of VCO
33 B2VCO Base 2 of VCO
34 B1VCO Base 1 of VCO
35 C2VC Collector 2 of VCO
36 GND Ground
37 GND Ground
38 VS Supply voltage PLL
39 PD Tri-state charge pump output
40 VD Active filter output
41 PLCK Lock-indicating output (open collector)
42 OSCI Input of reference oscillator/buffer
43 OSCO Output of reference oscillator/buffer
44 ADR Address selection (simple two-wire bus)
4904A–DAB–03/06
ATR2731
5
5 Page 
ATR2731
7.1 Phase Comparator and Charge Pump
www.DataSheet4U.com The tri-state phase detector causes the charge pump to source or to sink current at the output
pin PD depending on the phase relation of its input signals provided by the reference and the
main divider respectively. Four different values of this current can be selected by means of the
two-wire bus bits I50 and I100. By use of this option, changes of the loop characteristics due to
the variation of the VCO gain as a function of the tuning voltage can be reduced. The
charge-pump current can be switched off using the two-wire bus bit TRI. A change in the setting
of the charge pump current becomes active when the corresponding two-wire bus transmission
is completed. As described for the setting of the scaling factor of the programmable divider, an
internal synchronization procedure ensures that such changes do not become active while the
charge pump is sourcing or sinking current at its output pin. This behavior allows a change in the
charge pump current without restricting the controlled VCO's frequency spectrum.
A high-gain amplifier (output pin: VD), which is implemented in order to construct a loop filter, as
shown in the application circuit, can be switched off by means of the two-wire bus bit OS.
An internal lock detector checks if the phase difference of the input signals of the phase detector
is smaller than approximately 250 ns in seven subsequent comparisons. If phase lock is
detected, the open collector output pin PLCK is set to H (logical value). It should be noted that
the output current of this pin must be limited by external circuitry as it is not limited internally. If
the two-wire bus bit TRI is set to H, the lock detector function is deactivated and the logical value
of the PLCK output is undefined.
7.2 Switching Outputs
Three switching outputs controlled by the two-wire bus bits SWA, SWB, and SWC can be used
for any switching task on the front-end board. The currents of these outputs are not limited inter-
nally. They have to be limited by an external circuit.
7.3 D/A Converters
Three D/A converters, A, B, and C, offer the possibility of generating three output voltages at a
resolution of 8 bits. These voltages appear at the output pins CAO, CBO, and CCO. The con-
verters are controlled via the two-wire bus interface by means of the control bits CA0, ..., CA7,
CB0, ..., CB7 and CC0, ..., CC7, respectively, as shown in Table 8-1 on page 12. The output
voltages are defined as
7
∑VCAO
=
-V-----M---
128
×
CAj × 2j
j=0
7
∑VCBO
=
-V-----M---
128
×
CBj × 2j
j=0
7
∑VCCO
=
-V-----M---
128
×
CCj × 2j
j=0
where VM = 4.25V nominally. Due to the rail-to-rail outputs of these converters, almost the full
voltage range from 0V to 8.5V can be used. A common application of these converters is the
digital synthesis of control signals for the tuning of preselectors. The output pins CAO, CBO, and
CCO must be blocked externally with capacitors (100 nF) as shown in the application circuit (see
Figure 12-1 on page 20).
4904A–DAB–03/06
11
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet ATR2731.PDF ] | |
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