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PDF ATR2732 Data sheet ( Hoja de datos )

Número de pieza ATR2732
Descripción Integrated DAB One-chip Front End
Fabricantes ATMEL Corporation 
Logotipo ATMEL Corporation Logotipo



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No Preview Available ! ATR2732 Hoja de datos, Descripción, Manual

Features
HighlwywIwn.tDegatraaStheedeDt4AUB.coFmront-end Solution Covering Band III and L-band Reception
Convenient Internal Clock Generation, Single Reference Clock
Fractional PLL for VHF
Fully Integrated VCOs
High-precision Digitally Tunable Reference Oscillator
Integrated High-performance LNAs
Very Flexible Programming of the AGC
Automatically Aligned External Filter Tuning
Simple Three-wire Digital Control Interface for Easy Handling
Single Low Voltage (3.3V) Supply Operation
Low Current Consumption Due to Several Power-down Options
Small SMD Package (QFN 9 mm × 9 mm)
Applications
Commercial DAB Receivers
DAB Receiver Solutions for Car Radio Applications
Portable DAB Solutions
1. Description
The ATR2732 is a front-end monolithic integrated circuit, manufactured using Atmel’s
silicon-germanium BiCMOS process (SiGMOS).
The ATR2732 carries out all functions of RF and IF processing, as well as the
clock-signal generation for these functions. Therefore, there is an integrated fractional
PLL, which, equivalent to most of the other functions, can be controlled via an external
digital bus. The RF functions include LNA, down-conversion mixing, amplifying, detec-
tion, and gain control. An external SAW filter is required in the signal path after the RF
functions. Additional amplifiers with detection and control functions are integrated IF
functions.
The device offers several tuning support functions, and was created to simplify the
design and manufacturing process. To this end, the number of external components
are minimal.
The part fits perfectly to Atmel’s DAB baseband processor ATR2740.
Figure 1-1. Block Diagram
Integrated DAB
One-chip Front
End
ATR2732
Preliminary
Summary
VCO
VCO
L-band
PLL
VHF
frac. PLL
Gain
cntl
Vtune
gen.
A
D
RSSI
PWR
cntl
Control unit
SPI interface
NOTE: This is a summary document.
The complete document is available
under NDA. For more information,
please contact your local Atmel sales
office.
4918AS–DAB–03/06

1 page




ATR2732 pdf
ATR2732 [Preliminary]
This filter has an automatic tuner adjustment; that is, the tuning-voltage-generation block adjusts
www.DataSheet4U.com the pass band of this filter to the desired frequency. After passing this filter, the RF signal is
down-mixed to a fixed IF frequency of 38.912 MHz. The IF signal is amplified and passed to a
SAW filter (5). The first IF variable-gain amplifier is followed by an IF filter at position (6). This fil-
ter is used as an anti-alias-filter. Finally, the DAB signal is amplified using the 2nd IF amplifier.
The signal leaves the front-end IC at (7), giving the signal to the DAB baseband IC.
Figure 3-1. Functional Block Diagram with Labelled Inputs and Outputs
4) 5) 6)
3) 7)
1) Gain
cntl
2) Vtune
gen.
VCO
VCO
L-band
PLL
VHF
frac. PLL
A
D
RSSI
PWR
cntl
Control unit
SPI interface
4918AS–DAB–03/06
5

5 Page





ATR2732 arduino
ATR2732 [Preliminary]
7. Electrical Characteristics
www.DataSheet4U.com
Test conditions (if not otherwise specified): VCC = +3.3V, Tamb = +25°C, 50input match
No. Parameters
Test Conditions
Pin Symbol Min.
Typ.
Max.
Unit
1 Power Supply
1.1
Supply voltage of front
end ATR2732
VCC 3.0
3.5 V
1.2
Supply voltage of
baseband processor
VDi 1.65
VCC
V
1.3 Leakage current, all off
2 Power Control
I leak
3 25 µA
2.1 Power on/off delay
1 µs
2.2 Power off/on delay
5 ms
2.3
Supply current L-band
off
Reception only VHF
150 mA
2.4 Supply current L-band
185 mA
2.5
Power-off tuning
voltage generation
Tuning generation not
active
140 mA
2.6
Average current
consumption
80 mA
3 SPI Bus Interface
3.1 BUS voltage high
3.2 BUS voltage low
3.3 Clock frequency
3.4 Clock high time (SCK)
3.5 Clock low time (SCK)
3.6 Clock enable time
3.7 Data set-up time
3.8 Hold time MOSI
4 Reference Crystal Oscillator
VBUSH
VBUSL
1 / tper
tch
tcl
tcet
tsud
thda
VDi – 0.36
–0.3
0.4 × tper
0.4 × tper
5
0.4 × tper
0.4 × tper
VDi + 0.3
0.25
5
V
V
MHz
µs
4.1 Operating frequency
16 24.576 32
MHz
4.2 Tuning range
120 210
ppm
4.3
Reference clock output
voltage
Sine wave output
0.5 Vpp
5 VHF Fractional PLL
5.1 LO frequency
200 290 MHz
6 L-band PLL
6.1 LO frequency
1.26 1.27 GHz
7 IF Interface
7.1 IF frequency range
30 38.91 50
MHz
7.2
Baseband output
impedance
56 100
*) Type means: A = 100% tested, B = 100% correlation tested, C = Characterized on samples, D = Design parameter
Type*
A
A
A
C
C
A
A
B
B
A
A
A
C
A
A
A
A
D
D
4918AS–DAB–03/06
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