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PDF ATSAM2533 Data sheet ( Hoja de datos )
| Número de pieza | ATSAM2533 | |
| Descripción | Audio Processing | |
| Fabricantes | ATMEL Corporation | |
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Features
• Sinwgwlew.CDhaitpaSShyenett4hUe.scoizmer + Effects, Typical Application Includes:
– Wavetable Synthesis, Serial Midi In & Out, Parallel MIDI
– Effects: Reverb + Chorus, on MIDI and/or Audio In
– Surround on 2 or 4 Speakers with Intensity/Delay Control
– Equalizer: 4 Bands, Parametric
– Audio-In Processing through Echo, Equalizer, Surround
• Low Chip Count
– Synthesizer, ROM/Flash, DAC
– Effects RAM is Built-in (32K x 16)
• Low Power
– 23 mA Typ. Operating
– Single 3.3V Supply
– Built-in 1.8V Regulator with Power Down Mode
• High Quality Wavetable Synthesis
– 16-bit Samples, 48 kHz Sampling Rate, 24 dB Digital Filter per Voice
– Up to 64 Voices Polyphony
– Up to 16 Mega x 16 ROM for Firmware, and PCM Data
• Available Wavetable Firmware and Sample Sets
– CleanWave8 Low Cost General MIDI 1 Megabyte Firmware + Sample Set
– CleanWave32 High Quality 4 Megabyte Firmware + Sample Set
– CleanWave64 Top Quality 8 Megabyte Firmware + Sample Set
– Other Sample Sets Available under Special Conditions
• Fast Product to Market
– Enhanced P16 Processor with C Compiler
– Built-in ROM Debugger
– Flash Programmer through Dedicated Pin
• Small Footprint
– 14 x 14 mm, 0.5 mm Pitch, 100-lead LQFP Package
• Typical Applications
– Portable Telephones
– Computer Karaokes, Portable Karaokes
– Keyboards, Portable Keyboards Instruments
Audio
Processing
ATSAM2533
Low-power
Synthesizer
with Effects and
Built-in RAM
1. Description
The ATSAM2533 is a low cost derivative of the ATSAM97xx series. It retains the
same high quality synthesis with up to 64 voices polyphony. The ATSAM2533 maxi-
mum wavetable memory is 32 MBytes and the parallel communication is through a
standard 8-bit port.
The integrated 32K x 16 RAM allows for high quality effects without additional
components.
The highly integrated architecture from ATSAM2533 combines a specialized high per-
formance RISC-based digital signal processor (Synthesis/DSP) and a general
purpose 16-bit CISC-based control processor on a single chip. An on-chip memory
management unit (MMU) allows the synthesis/DSP and the control processor to share
external ROM and/or RAM memory devices. An intelligent peripheral I/O interface
function handles other I/O interfaces, such as the 8-bit parallel, the on-chip MIDI
6396A–DRMSD–15-Oct-08
1 page  
ATSAM2533
5. Pinout
www.DataSheet4U.com
5.1 Pin Description by Function 100-pin LQFP Package
• 5VT indicates a 5 volt tolerant input or i/O pin.
Table 5-1.
Name
GND
VD18
VD33
OUTVC18
D0-D7
CS
WR
RD
A0
IRQ
RESET
X1,X2
CKOUT
DABD0-1
CLBD
WSBD
DAAD
P0-P3
ATSAM2523 Pinout by Name
Pin#
TYPE Function
1, 12, 26, 41,
51, 69, 76, PWR
77, 84
Power ground - all GND pins should be returned to digital ground
Power for the internal PLL, + 1.8V nominal (1.8V ± 10%). These pins can be connected to the
79
PWR
output of the regulator OUTVC18 (pin 34).
A 100 nF decoupling capacitor should be connected between this pin and PLL ground (pin77)
13, 25, 33,
42, 50, 59,
68, 75, 83,
100
PWR
Periphery power + 3V to 3.6V. All VD33 pins should be returned to nominal +3.3V.
3.3V to 1.8 V regulator output. The built-in regulator gives 1.8V for internal use (core supply).
34
PWR
PLL supply pin VD18 could also be connected to this pin.
Decoupling capacitors 470pF in parallel with 2.2 or 4.7µF must be connected between
OUTVC18 and GND.
4-11
I/O 5VT 8 bit data bus to host processor. Information on these pins is parallel MIDI
2 IN 5VT Chip select from host, active low.
99 IN 5VT Write from host, active low.
3 IN 5VT Read from host, active low.
Select address of slave 8-bit interface registers:
0: data registers (read/write)
98 IN 5VT
1: status register (read) control register (write)
This pin has a built-in pull down.
97
OUT
Slave 8bit interface interrupt request. High when data is ready to be transferred from chip to
host. Reset by a read from host (CS/=0 and RD/=0)
82 IN 5VT Master reset input, active low.
80, 81
–
Crystal connection. Crystal frequency should be Fs * 256 (typ 12.288 MHz)
Xtal frequency is internally multiplied by 4 to provide the IC master clock. An external 12.288
MHz clock can also be used on X1 (Analog or 3.3V CMOS logic). X2 cannot be used to drive
external ICs, use CKOUT instead.
88
OUT
Buffered X2 output, can be used to drive external DAC master clock (256 * Fs)
91, 92
OUT
Two stereo serial audio data output (4 audio channels). Each output holds 64 bits (2 x 32) of
serial data per frame. Audio data has up to 20 bits precision.
89
OUT
Audio data bit clock, provides timing to DABD0-1, DAAD.
90
OUT
Audio data word select. The timing of WSBD can be selected to be I2S or Japanese
compatible.
93 IN 5VT Stereo serial audio data input.
49, 52-54
I/O 5VT General purpose programmable I/O pins. These pins have a built-in pull down.
6396A–DRMSD–15-Oct-08
5
5 Page 
ATSAM2533
9. Timings
www.DataSheet4U.com All timing conditions: VD33 =3.3V, VD18 =1.8V, TA = 25°C, all outputs except X2 have load capac-
itance = 30 pF.
All timings refer to tck, which is the internal master clock period.
The internal master clock frequency is 4 times the frequency at pin X1. Therefore tck = txtal/4.
The sampling rate is given by 1/(tck*1024). The maximum crystal frequency/clock frequency at
X1 is 12.288 MHz (48 kHz sampling rate).
9.1 Crystal Frequency Selection Considerations
There is a trade-off between the crystal frequency and the support of widely available external
ROM/Flash components. Table 9-1 allows to select the best fit for a given application;
Table 9-1. Crystal Frequency Selection Chart
Sample Rate (kHz)
Xtal (MHz)
tck (ns)
48
12.288
20.35
44.1
11.2896
22.14
37.5 9.60 26.04
31.25
8.00
31.25
ROM tA (ns)
92
101
120
146
Using 12.288 MHz crystal frequency allows to use widely available ROM/Flash with 90 ns
access time, while providing state of the art 48 kHz sampling rate.
9.2 PC Host Interface
9.2.1 Timings
Figure 9-1. Host Interface Read Cycle
A0
tavcs
CS/
tcslrdl
tprd
trdhcsh
RD/
D0-D7
trdldv
tdrh
6396A–DRMSD–15-Oct-08
11
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| PDF Descargar | [ Datasheet ATSAM2533.PDF ] | |
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