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PDF AT32UC3L032 Data sheet ( Hoja de datos )

Número de pieza AT32UC3L032
Descripción (AT32UC3L0xx) AVR32 32-bit MCU
Fabricantes ATMEL Corporation 
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Features
High-performance, Low-power 32-bit Atmel® AVR® Microcontroller
– Compact Single-cycle RISC Instruction Set Including DSP Instructions
– Read-modify-write Instructions and Atomic Bit Manipulation
– Performance
• Up to 64DMIPS Running at 50MHz from Flash (1 Flash Wait State)
• Up to 36DMIPS Running at 25MHz from Flash (0 Flash Wait State)
– Memory Protection Unit (MPU)
• Secure Access Unit (SAU) providing User-defined Peripheral Protection
picoPower® Technology for Ultra-low Power Consumption
Multi-hierarchy Bus System
– High-performance Data Transfers on Separate Buses for Increased Performance
– 12 Peripheral DMA Channels Improve Speed for Peripheral Communication
Internal High-speed Flash
– 64Kbytes, 32Kbytes, and 16Kbytes Versions
– Single-cycle Access up to 25MHz
– FlashVault Technology Allows Pre-programmed Secure Library Support for End
User Applications
– Prefetch Buffer Optimizing Instruction Execution at Maximum Speed
– 100,000 Write Cycles, 15-year Data Retention Capability
– Flash Security Locks and User-defined Configuration Area
Internal High-speed SRAM, Single-cycle Access at Full Speed
– 16Kbytes (64Kbytes and 32Kbytes Flash), or 8Kbytes (16Kbytes Flash)
Interrupt Controller (INTC)
– Autovectored Low-latency Interrupt Service with Programmable Priority
External Interrupt Controller (EIC)
Peripheral Event System for Direct Peripheral to Peripheral Communication
System Functions
– Power and Clock Manager
– SleepWalking Power Saving Control
– Internal System RC Oscillator (RCSYS)
– 32KHz Oscillator
– Multipurpose Oscillator and Digital Frequency Locked Loop (DFLL)
Windowed Watchdog Timer (WDT)
Asynchronous Timer (AST) with Real-time Clock Capability
– Counter or Calendar Mode Supported
Frequency Meter (FREQM) for Accurate Measuring of Clock Frequency
Six 16-bit Timer/Counter (TC) Channels
– External Clock Inputs, PWM, Capture, and Various Counting Capabilities
36 PWM Channels (PWMA)
– 8-bit PWM with a Source Clock up to 150MHz
Four Universal Synchronous/Asynchronous Receiver/Transmitters (USART)
– Independent Baudrate Generator, Support for SPI
– Support for Hardware Handshaking
One Master/Slave Serial Peripheral Interfaces (SPI) with Chip Select Signals
– Up to 15 SPI Slaves can be Addressed
Two Master and Two Slave Two-wire Interface (TWI), 400kbit/s I2C-compatible
One 8-channel Analog-to-digital Converter (ADC) with up to 12 Bits Resolution
– Internal Temperature Sensor
32-bit Atmel
AVR
Microcontroller
AT32UC3L064
AT32UC3L032
AT32UC3L016
32099I–01/2012

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AT32UC3L032 pdf
AT32UC3L016/32/64
2. Overview
2.1
Block Diagram
Figure 2-1. Block Diagram
TCK
TDO
TDI
TMS
DATAOUT
RESET_N
MCKO
MDO[5..0]
MSEO[1..0]
EVTI_N
EVTO_N
JTAG
INTERFACE
aWire
NEXUS
CLASS 2+
OCD
AVR32UC CPU
MEMORY PROTECTION UNIT
INSTR
DATA
INTERFACE INTERFACE
LOCAL BUS
INTERFACE
LOCAL BUS
16/8 KB
SRAM
SAU
MM
MS
HIGH SPEED
S/M BUS MATRIX
S
S SM
CONFIGURATION REGISTERS BUS
HSB-PB
BRIDGE B
HSB-PB
BRIDGE A
PERIPHERAL
DMA
CONTROLLER
64/32/16 KB
FLASH
POWER MANAGER
CLOCK
PA
PB
CONTROLLER
SLEEP
CONTROLLER
RESET
CONTROLLER
GCLK[4..0]
RCSYS
RC32OUT RC32K
XIN32
XOUT32
XIN0
XOUT0
RC120M
OSC32K
OSC0
DFLL
SYSTEM CONTROL
INTERFACE
EXTINT[5..1]
NMI
PWMA[35..0]
INTERRUPT
CONTROLLER
EXTERNAL INTERRUPT
CONTROLLER
PWM CONTROLLER
ASYNCHRONOUS
TIMER
WATCHDOG
TIMER
FREQUENCY METER
CAPACITIVE TOUCH
MODULE
USART0
USART1
USART2
USART3
SPI
TWI MASTER 0
TWI MASTER 1
TWI SLAVE 0
TWI SLAVE 1
8-CHANNEL ADC
INTERFACE
TIMER/COUNTER 0
TIMER/COUNTER 1
AC INTERFACE
GLUE LOGIC
CONTROLLER
DIS
VDIVEN
CSA[16:0]
CSB[16:0]
SMP
SYNC
RXD
TXD
CLK
RTS, CTS
SCK
MISO, MOSI
NPCS[3..0]
TWCK
TWD
TWALM
TWCK
TWD
TWALM
ADP[1..0]
TRIGGER
AD[8..0]
ADVREFP
A[2..0]
B[2..0]
CLK[2..0]
ACBP[3..0]
ACBN[3..0]
ACAP[3..0]
ACAN[3..0]
ACREFN
OUT[1:0]
IN[7..0]
PA
PB
32099I–01/2012
5

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AT32UC3L032 arduino
AT32UC3L016/32/64
3.2.2
Refer to the ”TWI Pin Characteristics(1)” on page 778 for a description of the electrical proper-
ties of the TWI, 5V Tolerant, and SMBUS pins.
Peripheral Functions
Each GPIO line can be assigned to one of several peripheral functions. The following table
describes how the various peripheral functions are selected. The last listed function has priority
in case multiple functions are enabled on the same pin.
Table 3-2. Peripheral Functions
Function
GPIO Controller Function multiplexing
Nexus OCD AUX port connections
aWire DATAOUT
JTAG port connections
Oscillators
Description
GPIO and GPIO peripheral selection A to H
OCD trace system
aWire output in two-pin mode
JTAG debug port
OSC0, OSC32
3.2.3
JTAG Port Connections
If the JTAG is enabled, the JTAG will take control over a number of pins, irrespectively of the I/O
Controller configuration.
Table 3-3. JTAG Pinout
48-pin
11
14
13
4
Pin Name
PA00
PA01
PA02
PA03
JTAG Pin
TCK
TMS
TDO
TDI
3.2.4
Nexus OCD AUX Port Connections
If the OCD trace system is enabled, the trace system will take control over a number of pins, irre-
spectively of the I/O Controller configuration. Two different OCD trace pin mappings are
possible, depending on the configuration of the OCD AXS register. For details, see the AVR32
UC Technical Reference Manual.
Table 3-4.
Pin
EVTI_N
MDO[5]
MDO[4]
MDO[3]
MDO[2]
Nexus OCD AUX Port Connections
AXS=1
AXS=0
PA05
PB08
PA10
PB00
PA18
PB04
PA17
PB05
PA16
PB03
32099I–01/2012
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