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PDF F7338 Data sheet ( Hoja de datos )

Número de pieza F7338
Descripción IRF7338
Fabricantes International Rectifier　
Logotipo International Rectifier Logotipo



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No Preview Available ! F7338 Hoja de datos, Descripción, Manual

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PD - 94372C
IRF7338
l Ultra Low On-Resistance
l Dual N and P Channel MOSFET
l Surface Mount
l Available in Tape & Reel
S1
G1
S2
G2
Description
These N and P channel MOSFETs from International
Rectifier utilize advanced processing techniques to achieve
the extremely low on-resistance per silicon area. This
benefit provides the designer with an extremely efficient
device for use in battery and load management
applications.
HEXFET® Power MOSFET
N-CHANNEL MOSFET
18
27
36
45
P-CHANNEL MOSFET
Top View
N-Ch P-Ch
D1
D1
VDSS 12V
D2
-12V
D2
RDS(on) 0.034Ω 0.150Ω
This Dual SO-8 has been modified through a customized
leadframe for enhanced thermal characteristics and
multiple-die capability making it ideal in a variety of power
applications. With these improvements, multiple devices
can be used in an application with dramatically reduced
board space. The package is designed for vapor phase,
infrared, or wave soldering techniques.
SO-8
Absolute Maximum Ratings
VDS
ID @ TA = 25°C
ID @ TA = 70°C
IDM
PD @TA = 25°C
PD @TA = 70°C
VGS
TJ, TSTG
Parameter
Drain-to-Source Voltage
Continuous Drain Current, VGS @ 4.5V
Continuous Drain Current, VGS @ 4.5V
Pulsed Drain Current 
Power Dissipation ƒ
Power Dissipation ƒ
Linear Derating Factor
Gate-to-Source Voltage
Junction and Storage Temperature Range
Thermal Resistance
Symbol
RθJL
RθJA
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Parameter
Junction-to-Drain Lead
Junction-to-Ambient ƒ
Max.
N-Channel
P-Channel
12
6.3
5.2
26
2.0
1.3
16
±12 „
-55 to + 150
-12
-3.0
-2.5
-13
± 8.0
Units
A
W
mW/°C
V
°C
Typ.
–––
–––
Max.
20
62.5
Units
°C/W
1
6/2/03

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F7338 pdf
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N-Channel
IRF7338
1000
800
600
400
Ciss
VGS = 0V, f = 1 MHZ
C iss = C gs + C gd , C ds
SHORTED
Crss = Cgd
Coss = Cds + Cgd
Coss
200 Crss
0
1
10 100
VDS, Drain-to-Source Voltage (V)
Fig 9. Typical Capacitance Vs.
Drain-to-Source Voltage
12
ID= 6.0A
10
VDS= 12V
8
6
4
2
0
0.0
2.0 4.0 6.0 8.0 10.0 12.0
QG Total Gate Charge (nC)
Fig 10. Typical Gate Charge Vs.
Gate-to-Source Voltage
100
D = 0.50
0.20
10
0.10
0.05
0.02
0.01
1
0.1
0.00001
SINGLE PULSE
(THERMAL RESPONSE)
0.0001
0.001
0.01
t1, Rectangular Pulse Duration (sec)
P DM
t1
t2
Notes:
1. Duty factor D =
t1/ t 2
2. Peak T J = P DM x Z thJA + T A
0.1 1
10
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient
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F7338 arduino
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IRF7338
SO-8 Package Details
D
A5
6
E
8765
1234
B
H
0.25 [.010]
A
6X e
e1
A
C
y
DIM
INCHES
MIN MAX
A .0532 .0688
A1 .0040 .0098
b .013 .020
c .0075 .0098
D .189 .1968
E .1497 .1574
e .050 BASIC
e 1 .025 BASIC
H .2284 .2440
K .0099 .0196
L .016 .050
y 0°
8°
MILLIMET ERS
MIN MAX
1.35 1.75
0.10 0.25
0.33 0.51
0.19 0.25
4.80 5.00
3.80 4.00
1.27 BASIC
0.635 BAS IC
5.80 6.20
0.25 0.50
0.40 1.27
0° 8°
K x 45°
8X b
A1
0.25 [.010] C A B
0.10 [.004]
NOT ES :
1. DIMENS IONING & T OLERANCING PER AS ME Y14.5M-1994.
2. CONT ROLLING DIMENS ION: MILLIMET ER
3. DIMENS IONS ARE S HOWN IN MILLIMET ERS [INCHES ].
4. OUT LINE CONFORMS T O JEDEC OUT LINE MS -012AA.
5 DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .
MOLD PROT RUS IONS NOT T O EXCEED 0.15 [.006].
6 DIMENS ION DOES NOT INCLUDE MOLD PROT RUS IONS .
MOLD PROT RUS IONS NOT T O EXCEED 0.25 [.010].
7 DIMENS ION IS THE LENGT H OF LEAD F OR S OLDERING T O
A S UBS T RAT E.
8X L 8X c
7
FOOT PRINT
8X 0.72 [.028]
6.46 [.255]
3X 1.27 [.050]
8X 1.78 [.070]
SO-8 Part Marking
EXAMPLE: T HIS IS AN IRF7101 (MOS FET )
INT ERNAT IONAL
RECT IFIER
LOGO
YWW
XXXX
F 7101
DAT E CODE (YWW)
Y = LAS T DIGIT OF T HE YEAR
WW = WEEK
LOT CODE
PART NUMBER
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