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PDF KK4020B Data sheet ( Hoja de datos )
| Número de pieza | KK4020B | |
| Descripción | 14 Stage Ripple-Carry Binary Counter/Divider High-Voltage Silicon-Gate CMOS | |
| Fabricantes | KODENSHI KOREA | |
| Logotipo |  |
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TECHNICAL DATA
KK4020B
14 Stage Ripple-Carry Binary
Counter/Divider
High-Voltage Silicon-Gate CMOS
The KK4020B is ripple-carry binary counter. All counter stages are master-
slave flip-flops. The state of a counter advances one count on the negative
transition of each input pulse; a high level on the RESET line resets the counter
to its all zeros state. Schmitt trigger action on the input-pulse line permits
unlimited rise and fall times.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-temperature
range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
N SUFFIX
PLASTIC DIP
16
1
16
1
ORDERING INFORMATION
KK4020BN Plastic DIP
KK4020BD SOIC
TA = -55° to 125° C for all packages
LOGIC DIAGRAM
CLOCK 10
9
Q1
7
Q4
5
Q5
4 Q6
6
Q7
13
Q8
12 Q9
14 Q10
15 Q11
1 Q12
2
Q13
3
Q14
RESET
11
PIN 16 =VCC
PIN 8 = GND
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Clock Reset
L
L
XH
H= high level
L = low level
X=don’t care
Output
Output state
No change
Advance to next
state
All Outputs are low
1
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KK4020B
Clock
Reset
Q1
Q4
Q5
Q6
Q7
Q8
Q9
Q10
Q11
Q12
Q13
Q14
Figure 3. Switching Waveforms
TIMING DIAGRAM
12 4
8 16 32 64 128 256 512 1024 2048 4096 8192 16384
EXPANDED LOGIC DIAGRAM
CLOCK
RESET
CL1 Q1
FF1
CL1 Q1
R Q1
CL2 Q2
FF2
CL2 Q2
R
CL3 Q13
CL3 Q13
FF3-FF13
CL14 Q14
FFI4
CL14 Q14
R
Q1 Q4 Q13
Q14
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet KK4020B.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| KK4020B | 14 Stage Ripple-Carry Binary Counter/Divider High-Voltage Silicon-Gate CMOS | KODENSHI KOREA |
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