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PDF EUA2123 Data sheet ( Hoja de datos )

Número de pieza EUA2123
Descripción 20-W Stereo Class-D Audio Power Amplifier
Fabricantes Eutech Microelectronics 
Logotipo Eutech Microelectronics Logotipo



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No Preview Available ! EUA2123 Hoja de datos, Descripción, Manual

EUA2123
20-W Stereo Class-D
Audio Power Amplifier
DESCRIPTION
The EUA2123 is a high efficient Class-D audio power
amplifier for delivering up to 2× 20W into a 4stereo
mode with a single-ended (SE) configuration or 1× 40W
into an 8mono mode with a bridge-tied-load (BTL)
configuration. The high efficiency of the EUA2123
eliminates the need for an external heat sink when playing
music.
The gain of the amplifier is controlled by two gain select
pins. The gain selections are 20, 26, 32, 36 dB. Short
circuit and thermal-overload protection prevent the device
from being damaged during a fault condition.
FEATURES
z 2× 20W, THD=10% at 4Load from a 24V Supply
z 2× 10W, THD=10% at 8Load from a 24V Supply
z 1× 40W, THD=10% at 8Load from a 24V Supply
z Operates from 10V to 30V
z Unique Modulation Scheme
z High Efficiency up to 90%
z Four Selectable Gain Settings
z Internal Oscillator
z Single-Ended Analog Inputs
z Mute and Shutdown Control
z Integrated On/Off /Mute Pop Suppression
z Thermal Protection with Auto Recovery
z Short-Circuit Latch-off Protection
z Space-Saving Surface-Mount 24-pin TSSOP Package
z RoHS compliant and 100% lead(Pb)-free
APPLICATIONS
z Televisions
Typical Application Circuit
www.DataSheet4U.com
Figure1.
DS2123 Ver 1.0 Feb. 2009
深圳市速学王科技
0755-82924118
1
www.mcu104.com

1 page




EUA2123 pdf
AC Characteristics TA = 25°C ,VCC=24V, RL=4(Unless otherwise noted)
Symbol
Parameter
Conditions
KSVR Supply ripple rejection
VCC=24V, VRIPPLE=200 mVPP 100Hz
Gain= 20dB
1kHz
Output power at 1% THD+N
VCC=24V, RL=4, f=1kHz
PO VCC=24V, RL=8, f=1kHz
Output power at 10% THD+N VCC=24V, RL=4, f=1kHz
VCC=24V, RL=8, f=1kHz
THD+N Total harmonic distortion +noise RL=4, f=1 kHz, PO=10W
RL=8, f=1 kHz, PO=5W
Vn Output integrated noise floor
20Hz to 22kHz, A-weighted filter,
Gain=20dB
Crosstalk
SNR Signal-to-noise ratio
fOSC
Thermal trip point
Thermal hysteresis
Oscillator frequency
Mute delay
Unmute delay
PO=1 W, f=1 kHz ,Gain=20dB
Maximum output at THD+N< 1%,
f=1kHz,Gain=20dB,RL=8,PO=5W
Time from mute input switches high until
outputs muted
Time from mute input switches low until
outputs unmuted
EUA2123
EUA2123
Min Typ Max
-58
-58
15
8
20
10
0.8%
0.4%
130
-77.5
-80
Unit
dB
W
µV
dBV
dB
92 dB
150
40
220 250 280 kHz
30 µsec
30 µsec
www.DataSheet4U.com
DS2123 Ver 1.0 Feb. 2009
深圳市速学王科技
0755-82924118
5
www.mcu104.com

5 Page





EUA2123 arduino
Input Capacitor, CI
In the typical application, an input capacitor (CI) is
required to allow the amplifier to bias the input signal to
the proper dc level for optimum operation. In this case,
CI and the input impedance of the amplifier (ZI) form a
high-pass filter with the corner frequency determined in
Equation 2.
EUA2123
Table 2 shows some common component values and the
associated cutoff frequencies:
Table.2 Gain Setting
Speaker
Impedance
()
4
8
CSE-DC Blocking Capacitor (µF)
fc=60Hz
fc=40Hz
fc=20Hz
(-3dB)
(-3dB)
(-3dB)
680
1000
2200
330 470 1000
fc
=
1
2πZiCi
-----------------(2)
The value of CI is important, as it directly affects the
bass (low-frequency) performance of the circuit.
Consider the example where ZI is 36kand the
specification calls for a flat bass response down to 20Hz.
Equation 2 is reconfigured as Equation 3.
Ci
=
1
2πZifc
-----------------(3)
In this example, CI is 0.22µF; so, one would likely
choose a value of 0.47µF, as this value is commonly
used. If the gain is known and is constant, use ZI from
Table 1 to calculate CI. A further consideration for this
capacitor is the leakage path from the input source
through the input network (CI) and the feedback network
to the load. This leakage current creates a dc offset
wwwv.oDlatatagSeheaett4tUhe.coimnput to the amplifier that reduces useful
headroom, especially in high-gain applications. For this
reason, a low-leakage tantalum or ceramic capacitor is
the best choice. When polarized capacitors are used, the
positive side of the capacitor should face the amplifier
input in most applications as the dc level there is held at
VBYP (VCC/12), which is likely higher than the source
dc level. Note that it is important to confirm the
capacitor polarity in the application. Additionally,
lead-free solder can create dc offset voltages, and it is
important to ensure that boards are cleaned properly.
Single-Ended Output Capacitor, CO
In single-ended (SE) applications, the dc blocking
capacitor forms a high-pass filter with the speaker
impedance. The frequency response rolls of with
decreasing frequency at a rate of 20dB/decade. The
cutoff frequency is determined by:
fc = 1/ 2πCO Z L
-----------------(4)
Output Filter and Frequency Response
To get better frequency response, a flat-passband output
filter (second-order Butterworth) may be used. The
output filter components consist of the series inductor
and capacitor to ground at the LOUT and ROUT pins.
There are some possible combinations depending on the
speaker impedance, and whether the output
configuration is single ended (SE) or bridge-tied load
(BTL). The values for the filter components are
recommended in Table 3. It is important to use a
high-quality capacitor in this application. A rating of at
least X7R is required.
Table.3 Recommended Filter Output Components
Output
Configuration
Single Ended
(SE)
Bridge Tied
Load (BTL)
Speaker
Impedance
()
4
8
4
8
Filter
Inductor
(µH)
22
47
10
22
Filter
Capacitor
(nF)
680
390
1500
680
Figure 26. BTL Filter Configuration
Figure 27. SE Filter Configuration
DS2123 Ver 1.0 Feb. 2009
11
深圳市速学王科技 0755-82924118 [email protected] www.mcu104.com

11 Page







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