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PDF YDA138 Data sheet ( Hoja de datos )
| Número de pieza | YDA138 | |
| Descripción | STEREO 10W DIGITAL AUDIO POWER AMPLIFIER | |
| Fabricantes | YAMAHA CORPORATION | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de YDA138 (archivo pdf) en la parte inferior de esta página. Total 20 Páginas | ||
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YDA138
D- 3
STEREO 10W DIGITAL AUDIO POWER AMPLIFIER
■Overview
YDA138 (D-3) is a high efficient digital audio power amplifier IC that operates with a single 12V power supply.
An audio power amplifier with a maximum output of 10W (RL=8Ω)×2ch or 20W (RL=4Ω)×1ch can be configured
with one chip.
YDA138 has a “Pure Pulse Direct Speaker Drive Circuit” which directly drives speakers while reducing distortion of
pulse output signal and reducing noise on the signal, and realizes the highest standard low distortion rate characteristics
and low noise characteristics as 10W-class of output digital amplifier IC.
In addition, circuit design with fewer external parts can be made depend on the condition of use because corresponds to
filter less.
YDA138 has 50mW (RL=32Ω)×2ch Class AB headphone amplifiers.
YDA138 provides Over-current protection function for speaker output terminals, IC thermal protection function, POP
noise reduction function, and AM interference measures function as well as power-down function and output mute
function.
■Features
Digital Amplifier
・Continuous maximum output
10 W×2ch ＠VDDP=12.0V, RL=8Ω, THD+N=10%
20 W×1ch ＠VDDP=12.0V, RL=4Ω, THD+N=10%
・Efficiency
www.DataSheet848U.c%om＠VDDP=12.0V, RL=8Ω, Po=10W
・Distortion Rate (THD+N)
0.02 % ＠VDDP=12.0V, RL=8Ω, Po=1.0W
・S/N Ratio
103dB ＠VDDP=12.0V, RL=8Ω, Po=10W, VOL[1:0]=H,H
・Channel Separation
-70dB ＠VDDP=12.0V, RL=8Ω, VOL[1:0]=H,H
Class AB Headphone Amplifier
・Maximum output
50mW×2ch ＠VDDP=12.0V, RL=32Ω, THD+N=10%
・Distortion Rate(THD+N)
0.01 % ＠VDDP=12.0V, RL=32Ω, Pho=30mW
・S/N Ratio
95dB ＠VDDP=12.0V, RL=32Ω, Pho=20mW, VOL[1:0]=H,H
Others
・Operating power supply range
9.0V to 13.5V
・Multi-channel synchronizing operation by
Master/Slave switching function
・Carrier frequency switching function
524kHz/466kHz
・Sleep function with SLEEPN terminal
・Output muting function with MUTEN terminal
・Over-current protection function
・Thermal protection function
・Clock stop detection function
・Pop noise reduction function
・AM interference measures function
・Analog input/BTL (Bridge-Tied Load) output
・42-pin plastic SSOP
Pin lead plating with Pd free (YDA138-EZ)
YDA138 CATALOG
CATALOG No.:LSI-4DA138A20
2005.3
1 page  
YDA138
■Mode setting
・Operating Mode
Outline
L * * * WL WL WL WL Z
Z Sleep mode
H L L * WL WL WL WL Z
- DA Mute mode *A)
H L H * WL WL RF RF Z
- HA Mute mode *A)
H H L LLL P-H P-H WL WL Z
- DA External Clock Slave mode *A)
H H L LLH P-L P-L WL WL Z
- DA External Clock Slave mode *A)
H H L LHL P-H P-H WL WL Z
- DA External Clock Master mode *A)
H H L LHH P-L P-L WL WL Z
- DA External Clock Master mode *A)
H H L HLL PLS PLS WL WL Z
- DA Internal Clock Slave mode *A)
H H L HHL PLS PLS WL WL Z
- DA Internal Clock Master mode *A)
H H H * WL WL SIG SIG Z
- HA mode *A)
H * * LL* - - - - - CKIN 4.19MHz Clock Input
H * * LH* - - - - - CKOUT 4.19MHz Clock Output
H * * HLL - - - - - CKIN ≒500kHz Input (Internal Clock)
H * * HHL - - - - - CKOUT ≒500KHz Output (Internal Clock)
Note:
1) “H” and “L” means logic level High and logic level Low, respectively.
2) “WL” means output disabled (weak pull-down output). “RF” means reference level output. “Z” means Hi-Z.
3) “P-H” means a carrier clock of 524kHz. “P-L” means a carrier clock of 466kHz. “PLS” means a carrier clock of
approx. 500kHz (Internally generated clock).
4) “SIG” means an analog audio signal output.
5) “CKIN” means input of a clock with designated frequency. “CKOUT” means output of a designated clock.
6) “DA” means Digital Amplifier. “HA” means Headphone Amplifier.
7) Each output of OUT*L, OUT*R, HPOL, HPOR, PROTN, and CKIO becomes a state as shown in “Protection
Mode”, depending on the protection state, when entering protection state from a mode except sleep mode.
8) In monaural mode, OUT*R signal as shown in the above “Operating Mode” becomes the same as OUT*L signal.
www.DataSheet94)U.cAIonmnodp, eHraPtOinRg
becomes “WL.”
modes indicated
by
*A),
a
state
of
the
output
signal
becomes
a
state
as
shown
in
“Protection
Mode”
during a protection mode.
10) “HLH” and “HHH” of MODE[2:0] is reserved for system use.
・Protection Mode
Outline
H H L * WL WL WL WL L
Z Digital Amplifier Over-current Protection
H * * * WL WL WL WL L
Z Over-Temperature Protection
H * * * WL WL - - -
- Clock Stop Protection
H * * * WL WL WL WL Z
Z Low Voltage Malfunction Prevention Protection
H H * * WL WL RF RF -
- Power Supply Voltage Fluctuation Protection
Note:
1) Each protection function operates when input terminal is in the designated logic condition. Output terminal
becomes a state as shown in the above during protection mode.
5
5 Page 
YDA138
■Application circuit examples
●2-channel Operating Mode (Internal Clock Master Mode)
www.DataSheet4U.com
ID
C1
C2
C3
C4
C5,C6
C7
Value
1μF
1μF
0.1μF
10μF
4.7μF
330μF
Element
Multilayer ceramic capacitor
Multilayer ceramic capacitor
Multilayer ceramic capacitor
Electrolytic capacitor
(0.1μF Ceramic capacitor)
Multilayer ceramic capacitor
Electrolytic capacitor
ID Value
Element
R1 100kΩ Chip Resistor
R2 1kΩ
Chip Resistor
R3 100kΩ Chip Resistor
R4 680Ω Chip Resistor
R5 1MΩ
Chip Resistor
U1 (CERALOCK) CSTCR4M19G53-B0
11
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet YDA138.PDF ] | |
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