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PDF ADP150 Data sheet ( Hoja de datos )
| Número de pieza | ADP150 | |
| Descripción | 150 mA CMOS Linear Regulator | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
Ultra low noise: 9 μV rms, independent of VOUT
No additional noise bypass capacitor required
Stable with 1 μF ceramic input and output capacitors
Maximum output current: 150 mA
Input voltage range: 2.2 V to 5.5 V
Low quiescent current
IGND = 10 μA with zero load
Low shutdown current: <1 μA
Low dropout voltage: 105 mV @ 150 mA load
Initial output voltage accuracy: ±1%
Up to 14 fixed output voltage options: 1.8 V to 3.3 V
PSRR performance of 70 dB at 10 kHz
Current limit and thermal overload protection
Logic-controlled enable
5-lead TSOT package
4-ball, 0.8 mm × 0.8 mm, 0.4 mm pitch WLCSP
APPLICATIONS
Mobile phones
Digital camera and audio devices
Portable and battery-powered equipment
Post dc-to-dc regulation
Portable medical devices
RF, PLL, VCO, and clock power supplies
GENERAL DESCRIPTION
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The ADP150 is an ultralow noise (9 μV), low dropout, linear
regulator that operates from 2.2 V to 5.5 V and provides up to
150 mA of output current. The low 105 mV dropout voltage at
150 mA load improves efficiency and allows operation over a
wide input voltage range.
Using an innovative circuit topology, the ADP150 achieves ultralow
noise performance without the necessity of an additional noise
bypass capacitor, making it ideal for noise sensitive analog and
RF applications. The ADP150 also achieves ultralow noise
performance without compromising PSRR or line and load
transient performance. The ADP150 offers the best combination
of ultralow noise and quiescent current consumption to maximize
battery life in portable applications.
Ultralow Noise,
150 mA CMOS Linear Regulator
ADP150
TYPICAL APPLICATION CIRCUITS
VIN = 2.3V
CIN
1µF
ON
OFF
1 VIN VOUT 5
2 GND
VOUT = 1.8V
COUT
1µF
3 EN
NC 4
NC = NO CONNECT
Figure 1. 5-Lead TSOT with Fixed Output Voltage, 1.8 V
VIN = 2.3V
CIN
1µF
ON
OFF
12
VIN VOUT
TOP VIEW
(Not to Scale)
VOUT = 1.8V
A COUT
1µF
EN GND B
Figure 2. 4-Ball WLCSP with Fixed Output Voltage, 1.8 V
The ADP150 is specifically designed for stable operation with
tiny 1 μF ± 30% ceramic input and output capacitors to meet
the requirements of high performance, space-constrained
applications.
The ADP150 is available in 14 fixed output voltage options,
ranging from 1.8 V to 3.3 V.
Short-circuit and thermal overload protection circuits prevent
damage in adverse conditions. The ADP150 is available in tiny
5-lead TSOT and 4-ball, 0.4 mm pitch WLCSP packages for the
smallest footprint solution to meet a variety of portable power
applications.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2009 Analog Devices, Inc. All rights reserved.
1 page  
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
VIN to GND
VOUT to GND
EN to GND
Storage Temperature Range
Operating Junction Temperature Range
Operating Ambient Temperature Range
Soldering Conditions
Rating
−0.3 V to +6.5 V
−0.3 V to VIN
−0.3 V to +6.5 V
−65°C to +150°C
−40°C to +125°C
−40°C to +85°C
JEDEC J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL DATA
Absolute maximum ratings apply individually only, not in
combination. The ADP150 can be damaged when the junction
temperature limits are exceeded. Monitoring ambient temperature
does not guarantee that TJ is within the specified temperature
limits. In applications with high power dissipation and poor
thermal resistance, the maximum ambient temperature may
have to be derated.
In applications with moderate power dissipation and low
printed circuit board (PCB) thermal resistance, the maximum
ambient temperature can exceed the maximum limit as long
as the junction temperature is within specification limits. The
junction temperature (TJ) of the device is dependent on the
www.DaamtaSbiheenettt4eUm.cpoemrature (TA), the power dissipation of the device (PD),
and the junction-to-ambient thermal resistance of the package
(θJA).
Maximum junction temperature (TJ) is calculated from the
ambient temperature (TA) and power dissipation (PD) by
TJ = TA + (PD × θJA)
ADP150
The junction-to-ambient thermal resistance (θJA) of the package
is based on modeling and a calculation using a 4-layer board.
The junction-to-ambient thermal resistance is highly dependent
on the application and board layout. In applications where high
maximum power dissipation exists, close attention to thermal
board design is required. The value of θJA can vary, depending on
PCB material, layout, and environmental conditions. The specified
values of θJA are based on a 4-layer, 4 inch × 3 inch circuit board.
Refer to JESD 51-7 and JESD 51-9 for detailed information
on the board construction. For additional information, see
the AN-617 Application Note, MicroCSP™ Wafer Level Chip
Scale Package.
ΨJB is the junction-to-board thermal characterization parameter
with units of °C/W. ΨJB of the package is based on modeling and
a calculation using a 4-layer board. The JESD51-12, Guidelines
for Reporting and Using Package Thermal Information, states that
thermal characterization parameters are not the same as thermal
resistances. ΨJB measures the component power flowing through
multiple thermal paths rather than a single path as in thermal
resistance, θJB. Therefore, ΨJB thermal paths include convection
from the top of the package as well as radiation from the package,
factors that make ΨJB more useful in real-world applications.
Maximum junction temperature (TJ) is calculated from the
board temperature (TB) and power dissipation (PD) by
TJ = TB + (PD × ΨJB)
Refer to JESD51-8 and JESD51-12 for more detailed information
about ΨJB.
THERMAL RESISTANCE
θJA and ΨJB are specified for the worst-case conditions, that is, a
device soldered in a circuit board for surface-mount packages.
Table 4. Thermal Resistance
Package Type
θJA ΨJB Unit
5-Lead TSOT
170 43
°C/W
4-Ball, 0.4 mm Pitch WLCSP 260
58
°C/W
ESD CAUTION
Rev. 0 | Page 5 of 20
5 Page 
THEORY OF OPERATION
The ADP150 is an ultralow noise, low quiescent current, low
dropout linear regulator that operates from 2.2 V to 5.5 V and
can provide up to 150 mA of output current. Drawing a low 220 μA
of quiescent current (typical) at full load makes the ADP150 ideal
for battery-operated portable equipment. Shutdown current
consumption is typically 200 nA.
Using new innovative design techniques, the ADP150 provides
superior noise performance for noise sensitive analog and
RF applications without the need for a noise bypass capacitor.
The ADP150 is also optimized for use with small 1 μF ceramic
capacitors.
VIN VOUT
GND
SHORT CIRCUIT,
UVLO, AND
THERMAL
PROTECT
R1
EN SHUTDOWN
VOLTAGE
REFERENCE
R2
Figure 26. Internal Block Diagram
ADP150
Internally, the ADP150 consists of a reference, an error amplifier,
a feedback voltage divider, and a PMOS pass transistor. Output
current is delivered via the PMOS pass device that is controlled
by the error amplifier. The error amplifier compares the reference
voltage with the feedback voltage from the output and amplifies
the difference. If the feedback voltage is lower than the reference
voltage, the gate of the PMOS device is pulled lower, allowing
more current to pass and increasing the output voltage. If the
feedback voltage is higher than the reference voltage, the gate of
the PMOS device is pulled higher, allowing less current to pass
and decreasing the output voltage.
The ADP150 is available in 14 output voltage options, ranging
from 1.8 V to 3.3 V. The ADP150 uses the EN pin to enable and
disable the VOUT pin under normal operating conditions. When
EN is high, VOUT turns on, and when EN is low, VOUT turns
off. For automatic startup, EN can be tied to VIN.
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Rev. 0 | Page 11 of 20
11 Page | ||
| Páginas | Total 20 Páginas | |
| PDF Descargar | [ Datasheet ADP150.PDF ] | |
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