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BLD6G22LS-50 fiches techniques PDF

NXP Semiconductors - W-CDMA 2110 MHz To 2170 MHz Fully Integrated Doherty Transistor

Numéro de référence BLD6G22LS-50
Description W-CDMA 2110 MHz To 2170 MHz Fully Integrated Doherty Transistor
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BLD6G22LS-50 fiche technique
BLD6G22L-50; BLD6G22LS-50
W-CDMA 2110 MHz to 2170 MHz fully integrated Doherty
transistor
Rev. 01 — 15 December 2009
Objective data sheet
1. Product profile
1.1 General description
The BLD6G22L-50 and BLD22LS-50 incorporate a fully integrated Doherty solution using
NXP’s state of the art GEN6 LDMOS technology. This device is perfectly suited for CDMA
base station applications at frequencies from 2110 MHz to 2170 MHz. The main and peak
device, input splitter and output combiner are integrated in a single package. This
package consists of one gate and drain lead and two extra leads of which one is used for
biasing the peak amplifier and the other is not connected. It only requires the proper
input/output match and bias setting as with a normal class-AB transistor.
Table 1. Typical performance
RF performance at Th = 25 °C.
Mode of operation
f
(MHz)
W-CDMA [1][2]
2110 to 2170
VDS PL(AV)
(V) (W)
28 8
Gp
(dB)
13.3
ηD
(%)
38
ACPR
(dBc)
30
PL(3dB)
(W)
52
[1] Test signal: 2-carrier W-CDMA; test model 1; 64 DPCH; PAR = 8.3 dB at 0.01 % probability on CCDF;
carrier spacing 5 MHz.
[2] IDq = 170 mA (main); VGS(amp)peak = 0 V.
CAUTION
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This device is sensitive to ElectroStatic Discharge (ESD). Therefore care should be taken
during transport and handling.
1.2 Features
„ Typical W-CDMA performance at frequencies from 2110 MHz to 2170 MHz:
‹ Average output power = 8 W
‹ Power gain = 13.3 dB
‹ Efficiency = 38 %
„ Fully optimized integrated Doherty concept:
‹ integrated asymmetrical power splitter at input
‹ integrated power combiner
‹ peak biasing down to 0 V
‹ low junction temperature
‹ high efficiency

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