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PDF ADF9010 Data sheet ( Hoja de datos )

Número de pieza ADF9010
Descripción 900 MHz ISM Band Analog RF Front End
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo



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FEATURES
840 MHz to 960 MHz ISM bands
Rx baseband analog low-pass filtering and PGA
Integrated RF Tx upconverter
Integrated integer-N PLL and VCO
Integrated Tx PA preamplifier
Differential fully balanced architectures
3.3 V supply
Low power mode: <1 mA power-down current
Programmable Rx LPF cutoff
330 kHz, 880 kHz, 1.76 MHz, and bypass
Rx PGA gain settings: 3 dB to 24 dB in 3 dB steps
Low noise BiCMOS technology
48-lead, 7 mm × 7 mm LFCSP
APPLICATIONS
900 MHz RFID readers
Unlicensed band 900 MHz applications
GENERAL DESCRIPTION
The ADF9010 is a fully integrated RF Tx modulator and Rx
analog baseband front end that operates in the frequency
www.DaratanSgheeferot4mU.8c4om0 MHz to 960 MHz. The receive path consists
of a fully differential I/Q baseband PGA, low-pass filter, and
general signal conditioning before connecting to an Rx ADC
for baseband conversion. The Rx LPF gain ranges from 3 dB
to 24 dB, programmable in 3 dB steps. The Rx LPF features
four programmable modes with cutoff frequencies of 330 kHz,
880 kHz, and 1.76 MHz, or the filter can be bypassed if necessary.
900 MHz ISM Band
Analog RF Front End
ADF9010
RxINIP
RxININ
RxCM
RxINQP
RxINQN
MUXOUT
RSET
CP
VTUNE
LOOUTP
LOOUTN
TxOUTP
TxOUTN
FUNCTIONAL BLOCK DIAGRAM
RXVDD AVDD
VP DVDD
CE
VCM ADF9010
VCM
DC OFFSET
CORRECTION
RxBBIP
RxBBIN
OVF
DC OFFSET
CORRECTION
CHARGE
PUMP
PHASE
FREQUENCY
DETECTOR
R
COUNTER
B
COUNTER
A
COUNTER
÷4
QUADRATURE
PHASE SPLITTER
24-BIT
INPUT SHIFT
REGISTER
PLL
N COUNTER
N = BP + A
PRESCALER
P/P + 1
DGND
AGND
Figure 1.
RxBBQP
RxBBQN
SCLK
SDATA
SLE
REFIN
CEXT1
CEXT2
CEXT3
CEXT4
CT
TxBBIP
TxBBIN
TxBBQP
TxBBQN
The transmit path consists of a fully integrated differential Tx
direct I/Q upconverter with a high linearity PA driver amplifier.
It converts a baseband I/Q signal to an RF carrier-based signal
between 840 MHz and 960 MHz. The highly linear transmit
signal path ensures low output distortion.
Complete local oscillator (LO) signal generation is integrated
on chip, including the integer-N synthesizer and VCO, which
generate the required I and Q signals for transmit I/Q upconver-
sion. The LO signal is also available at the output to drive an
external RF demodulator. Control of all the on-chip registers
is via a simple 3-wire serial interface. The device operates with a
power supply ranging from 3.15 V to 3.45 V and can be powered
down when not in use.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2008 Analog Devices, Inc. All rights reserved.

1 page




ADF9010 pdf
ADF9010
INTEGER-N PLL AND VCO CHARACTERISTICS
Table 3.
Parameter
VCOOPERATING FREQUENCY
LO OUTPUT CHARACTERISTICS
VCO Control Voltage Sensitivity
Harmonic Content (Second)
Harmonic Content (Third)
Frequency Pushing (Open Loop)
Frequency Pulling (Open Loop)
Lock Time
Output Power
Output Power Variation
NOISE CHARACTERISTICS
VCO Phase Noise Performance2
@ 100 kHz Offset
@ 1 MHz Offset
@ 10 MHz Offset
In-Band Phase Noise3, 4
Normalized In-Band Phase Noise Floor3, 4
Spurious Frequencies at Output Channel Spacing
PHASE DETECTOR
Phase Detector Frequency5
Maximum Allowable Prescaler Output Frequency6
CHARGE PUMP
ICP Sink/Source
High Value
Low Value
www.DataShReSeETt4RUan.cgoem
ICP Three-State Leakage Current
Sink and Source Current Matching
ICP vs. VCP
ICP vs. Temperature
PLL REFERENCE
Reference Clock Frequency
Reference Clock Sensitivity
Reference Input Capacitance
REFIN Input Current
Min
3360
2.7
10
0.7
B Version1
Typ Max
3840
8
−27
−14
1.2
10
1000
−4 to +5
±3
−120
−141
−154
−96
−220
−70
8
325
5
0.625
0.2
2
1.5
2
5
10
104
PLL VDD
±100
Unit
MHz
MHz/V
dBc
dBc
MHz/V
Hz
μs
dBm
dB
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc
MHz
MHz
mA
mA
nA
%
%
%
MHz
V p-p
pF
μA
Test Conditions/Comments
Measured at LO output (900 MHz)
3.6 GHz VCO frequency (taking into account
divide by 4)
Into 2.00 VSWR load.
10 kHz loop bandwidth
LO outputs combined in a 1:1 transformer;
programmable in 3 dB steps
Measured at LO output (900 MHz)
@ 1 kHz offset from carrier
900 MHz offset, 1 MHz PFD frequency, 250 kHz
channel spacing; loop bandwidth = 7.5 kHz
With RSET = 4.7 kΩ
1.25 V ≤ VCP ≤ 2.5 V
1.25 V ≤ VCP ≤ 2.5 V
VCP = 2.0 V
1 Operating temperature range for the B version is −40°C to +85°C.
2 The noise of the VCO is measured in open-loop conditions.
3 The phase noise is measured with the EVAL-ADF9010EBZ1 evaluation board and the Agilent E5052A spectrum analyzer. The spectrum analyzer provides the REFIN for
the synthesizer; offset frequency = 1 kHz.
4 fREFIN = 10 MHz; fPFD = 1000 kHz; N = 3600; loop BW = 25 kHz.
5 Guaranteed by design. Sample tested to ensure compliance.
6 This is the maximum operating frequency of the CMOS counters. The prescaler value should be chosen to ensure that the RF input is divided down to a frequency that
is less than this value.
Rev. 0 | Page 5 of 28

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ADF9010 arduino
9
8
7
6
5
4
3
2
–40°C 3.15V POUT +25°C 3.15V POUT +85°C 3.15V POUT
1
–40°C 3.3V POUT +25°C 3.3V POUT +85°C 3.3V POUT
–40°C 3.45V POUT +25°C 3.45V POUT +85°C 3.45V POUT
0
1 10
INPUT FREQUENCY (MHz)
100
Figure 10. Single Sideband Power vs. Baseband Input Frequency, with
Supply and Temperature Variations; Maximum Gain Setting Selected;
LO Frequency = 900 MHz
ADF9010
20
0
–20
Fc 330KHz
–40 Fc 1MHz
Fc 2MHz
BYPASS
–60
–80
–100
10k
100k
1M
FREQUENCY (Hz)
10M
Figure 11. Rx Filter Performance, Power vs. Input Frequency
www.DataSheet4U.com
Rev. 0 | Page 11 of 28

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