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WCMB2016R4X fiches techniques PDF

Weida Semiconductor - 128K x 16 Static RAM

Numéro de référence WCMB2016R4X
Description 128K x 16 Static RAM
Fabricant Weida Semiconductor 
Logo Weida Semiconductor 





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WCMB2016R4X fiche technique
WCMB2016R4X
Features
• Low voltage range:
1.65V1.95V
• Ultra-low active power
— Typical Active Current: 0.5 mA @ f = 1 MHz
— Typical Active Current: 1.5 mA @ f = fmax
• Low standby power
• Easy memory expansion with CE and OE features
• Automatic power-down when deselected
• CMOS for optimum speed/power
Functional Description
The WCMB2016R4X is a high-performance CMOS static
RAM organized as 128K words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
This device is ideal for portable applications such as cellular
telephones. The device also has an automatic power-down
feature that significantly reduces power consumption by 99%
when addresses are not toggling. The device can also be put
into standby mode when deselected (CE HIGH or both BLE
Logic Block Diagram
www.DataSheet4U.com
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
DATA IN DRIVERS
128K x 16
RAM Array
2048 X 1024
128K x 16 Static RAM
and BHE are HIGH). The input/output pins (I/O0 through I/O15)
are placed in a high-impedance state when: deselected (CE
HIGH), outputs are disabled (OE HIGH), both Byte High En-
able and Byte Low Enable are disabled (BHE, BLE HIGH), or
during a write operation (CE LOW, and WE LOW).
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O0 through I/O7), is
written into the location specified on the address pins (A0
through A16). If Byte High Enable (BHE) is LOW, then data
from I/O pins (I/O8 through I/O15) is written into the location
specified on the address pins (A0 through A16).
Reading from the device is accomplished by taking Chip En-
able (CE) and Output Enable (OE) LOW while forcing the Write
Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then
data from the memory location specified by the address pins
will appear on I/O0 to I/O7. If Byte High Enable (BHE) is LOW,
then data from memory will appear on I/O8 to I/O15. See the
Truth Table at the back of this data sheet for a complete de-
scription of read and write modes.
The WCMB2016R4X is available in a 48-ball FBGA package.
I/O0–I/O7
I/O8–I/O15
COLUMN DECODER
Power -Down
Circuit
CE
BHE
BLE
BHE
WE
CE
OE
BLE

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