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PDF STP6N95K5 Data sheet ( Hoja de datos )

Número de pieza STP6N95K5
Descripción Power MOSFETs
Fabricantes STMicroelectronics 
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No Preview Available ! STP6N95K5 Hoja de datos, Descripción, Manual

STD6N95K5, STF6N95K5
STP6N95K5, STW6N95K5
N-channel 950 V, 1 , 5 A TO-220, TO-220FP, TO-247, DPAK
Zener-protected SuperMESH 5™ Power MOSFET
Preliminary data
Features
Type
STD6N95K5
STF6N95K5
STP6N95K5
STW6N95K5
VDSS RDS(on)max
950 V < 1.25
ID
5A
PW
90 W
25 W
90 W
DPAK worldwide best RDS(on)
Worldwide best FOM (figure of merit)
Ultra low gate charge
100% avalanche tested
Zener-protected
Application
Switching applications
Description
SuperMESH 5™ is a revolutionary avalanche-
rugged very high voltage Power MOSFET
technology based on an innovative proprietary
www.DataSvheeretitc4Ua.lcsotmructure. The result is a drastic reduction
in on-resistance and ultra low gate charge for
applications which require superior power density
and high efficiency.
3
2
1
TO-220
3
2
1
TO-220FP
3
1
DPAK
3
2
1
TO-247
Figure 1. Internal schematic diagram
D(2)
G(1)
S(3)
AM01476v1
Table 1. Device summary
Order codes
STD6N95K5
STF6N95K5
STP6N95K5
STW6N95K5
Marking
6N95K5
Package
DPAK
TO-220FP
TO-220
TO-247
Packaging
Tape and reel
Tube
January 2010
Doc ID 16958 Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/13
www.st.com
13

1 page




STP6N95K5 pdf
STD/F/P/W6N95K5
Electrical characteristics
Table 6.
Symbol
Switching times
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Test conditions
Min. Typ. Max. Unit
TBD
VDD = 475 V, ID = 2.5 A,
RG=4.7 , VGS=10 V
(see Figure 5)
-
TBD
TBD
-
TBD
ns
ns
ns
ns
Table 7.
Symbol
Source drain diode
Parameter
Test conditions
Min. Typ. Max. Unit
ISD
ISDM
VSD(1)
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD= 5 A, VGS=0
-
-
5 mA
20 A
1.5 V
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD= 5 A, VDD= 60 V
di/dt = 100 A/µs,
(see Figure 4)
TBD
- TBD
TBD
ns
µC
A
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD= 5 A,VDD= 60 V
TBD
di/dt=100 A/µs,
- TBD
Tj=150 °C(see Figure 4)
TBD
ns
µC
A
1. Pulsed: pulse duration = 300µs, duty cycle 1.5%
Table 8.
Symbol
Gate-source Zener diode
Parameter
Test conditions
Min Typ. Max. Unit
BVGSO Gate-source breakdown voltage Igs ± 1mA, (open drain) 30
-
V
www.DataSheet4U.com
The built-in-back Zener diodes have specifically been designed to enhance not only the
device’s ESD capability, but also to make them safely absorb possible voltage transients that
may occasionally be applied from gate to source. In this respect the Zener voltage is
appropriate to achieve an efficient and cost-effective intervention to protect the device’s
integrity. These integrated Zener diodes thus avoid the usage of external components.
Doc ID 16958 Rev 1
5/13

5 Page





STP6N95K5 arduino
STD/F/P/W6N95K5
DIM.
A
A1
A2
b
b4
c
c2
D
D1
E
E1
e
e1
H
L
L1
L2
L4
R
V2
Package mechanical data
TO-252 (DPAK) mechanical data
min.
2.20
0.90
0.03
0.64
5.20
0.45
0.48
6.00
6.40
4.40
9.35
1
0.60
0o
mm.
ty p
5.10
4.70
2.28
2.80
0.80
0.20
max.
2.40
1.10
0.23
0.90
5.40
0.60
0.60
6.20
6.60
4.60
10.10
1
8o
www.DataSheet4U.com
0068772_G
Doc ID 16958 Rev 1
11/13

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