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PDF KK74AC109 Data sheet ( Hoja de datos )
| Número de pieza | KK74AC109 | |
| Descripción | Dual J-K Flip-Flop | |
| Fabricantes | KODENSHI KOREA | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de KK74AC109 (archivo pdf) en la parte inferior de esta página. Total 6 Páginas | ||
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Dual J-K Flip-Flop
with Set and Reset
High-Speed Silicon-Gate CMOS
TECHNICAL DATA
www.DataSheet4U.com
KK74AC109
The KK74AC109 is identical in pinout to the LS/ALS109,HC/HCT109.
The device inputs are compatible with standard CMOS outputs, with
pullup resistors, they are compatible with LS/ALS outputs.
This device consists of two J-K flip-flops with individual set, reset,
and clock inputs. Changes at the inputs are reflected at the outputs with
the next low-to-high transition of the clock. Both Q to Q outputs are
available from each flip-flop.
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2.0 to 6.0 V
• Low Input Current: 1.0 µA; 0.1 µA @ 25°C
• High Noise Immunity Characteristic of CMOS Devices
• Outputs Source/Sink 24 mA
ORDERING INFORMATION K
KK74AC109N Plastic
KK74AC109D SOIC
TA = -40° to 85° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16=VCC
PIN 8 = GND
FUNCTION TABLE
Inputs
Outputs
Set Reset Clock J K Q Q
LH
X XX H L
HL
LL
X XX L H
X
X X H*
H*
HH
LL L H
HH
H L Toggle
HH
L H No Change
HH
HH H L
HH
L X X No Change
X = Don’t care
*Both outputs will remain high as long as Set and
Reset are low, but the output states are
unpredictable if Set and Reset go high
simultaneously.
1
1 page  
KK74AC109
www.DataSheet4U.com
Figure 1. Switching Waveform
Figure 2. Switching Waveform
Figure 3. Switching Waveform
EXPANDED LOGIC DIAGRAM
5
5 Page | ||
| Páginas | Total 6 Páginas | |
| PDF Descargar | [ Datasheet KK74AC109.PDF ] | |
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