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Cypress Semiconductor - 1 Mbit (128K x 8) Serial SPI nvSRAM

Numéro de référence CY14B101Q1
Description 1 Mbit (128K x 8) Serial SPI nvSRAM
Fabricant Cypress Semiconductor 
Logo Cypress Semiconductor 





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CY14B101Q1 fiche technique
CY14B101Q1
CY14B101Q2
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CY14B101Q3
1 Mbit (128K x 8) Serial SPI nvSRAM
Features
1 Mbit Nonvolatile SRAM
Internally organized as 128K x 8
STORE to QuantumTrap Nonvolatile Elements initiated au-
tomatically on Power Down (AutoStore) or by user using HSB
Pin (Hardware Store) or SPI instruction (Software Store)
RECALL to SRAM initiated on Power Up (Power Up Recall)
or by SPI Instruction (Software RECALL)
Automatic STORE on Power Down with a small Capacitor
High Reliability
Infinite Read, Write, and RECALL Cycles
1 Million STORE cycles to QuantumTrap
Data Retention: 20 Years
High Speed Serial Peripheral Interface (SPI)
40 MHz Clock Rate
Supports SPI Modes 0 (0,0) and 3 (1,1)
Write Protection
Hardware Protection using Write Protect (WP) Pin
Software Protection using Write Disable Instruction
Software Block Protection for 1/4,1/2, or entire Array
Low Power Consumption
Single 3V +20%, –10% Operation
Average VCC current of 10 mA at 40 MHz Operation
Industry Standard Configurations
Industrial Temperature
CY14B101Q1 has identical pin configuration to industry stan-
dard 8-pin NV Memory
8-pin DFN and 16-pin SOIC Packages
RoHS Compliant
Logic Block Diagram
Functional Overview
The Cypress CY14B101Q1/CY14B101Q2/CY14B101Q3
combines a 1 Mbit nonvolatile static RAM with a nonvolatile
element in each memory cell. The memory is organized as 128K
words of 8 bits each. The embedded nonvolatile elements incor-
porate the QuantumTrap technology, creating the world’s most
reliable nonvolatile memory. The SRAM provides infinite read
and write cycles, while the QuantumTrap cell provides highly
reliable nonvolatile storage of data. Data transfers from SRAM to
the nonvolatile elements (STORE operation) takes place
automatically at power down. On power up, data is restored to
the SRAM from the nonvolatile memory (RECALL operation).
Both STORE and RECALL operations can also be triggered by
the user.
Configuration
Feature
AutoStore
Software
STORE
Hardware
STORE
CY14B101Q1
No
Yes
CY14B101Q2
Yes
Yes
CY14B101Q3
Yes
Yes
No No Yes
VCC
VCAP
CS
WP
SCK
HOLD
SI
Instruction decode
Write protect
Control logic
Quantum Trap
128K X 8
SRAM ARRAY
128K X 8
STORE
RECALL
Instruction
register
Address
Decoder
A0-A16
D0-D7
Data I/O register
Power Control
STORE/RECALL
Control
HSB
SO
Status register
Cypress Semiconductor Corporation • 198 Champion Court
Document #: 001-50091 Rev. *D
• San Jose, CA 95134-1709 • 408-943-2600
Revised January 04, 2010

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