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PDF TS4985 Data sheet ( Hoja de datos )
| Número de pieza | TS4985 | |
| Descripción | 2x1.2w Stereo Audio Power Amplifier | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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TS4985
2 X 1.2W Stereo Audio Power Amplifier with
Dedicated Standby Pins
■ Operating from VCC=2.2V to 5.5V
■ 1.2W output power per channel @ VCC=5V,
THD+N=1%, RL=8Ω
■ 10nA standby current
■ 62dB PSRR @ 217Hz with grounded inputs
■ High SNR: 106dB(A) typ.
■ Near zero pop & click
■ Lead-free 15 bumps, flip-chip package
Description
The TS4985 has been designed for top-class
stereo audio applications. Thanks to its compact
and power-dissipation efficient flip-chip package,
it suits various applications.
With a BTL configuration, this audio power
amplifier is capable of delivering 1.2W per
channel of continuous RMS output power into an
8Ω load @ 5V.
Each output channel (left and right), has an
external controlled standby mode pin (STDBYL &
STDBYR) to reduce the supply current to less
than 10nA per channel. The device also features
an internal thermal shutdown protection.
The gain of each channel can be configured by
external gain setting resistors.
Flip-chip - 15 bumps
Pin Connection (top view)
VCC1
VO-L
IN-L
VCC2
VO+L
IN+L
STDBYL
BYPASS
STDBYR
IN+R
VO+R
GND2
IN-R
VO-R
GND1
Applications
■ Cellular mobile phones
■ Notebook & PDA computers
■ LCD monitors & TVs
■ Portable audio devices
Order Codes
Part Number
TS4985EIJT
TS4985EKIJT
Temperature Range
-40, +85°C
Package
Lead free flip-chip
Lead free flip-chip +
back coating
Packaging
Tape & Reel
Marking
A85
May 2005
Rev 2
1/29
www.st.com
29
1 page  
TS4985
ElectricalwCwhwa.DraatcatSehreiestt4iUc.csom
Table 5. VCC = +3.3V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
Parameter
Min. Typ. Max.
Unit
ICC
Supply Current
No input signal, no load
6.6 12
mA
ISTANDBY
Standby Current (1)
No input signal, Vstdby = GND, RL = 8Ω
10 1000
nA
Voo
Output Offset Voltage
No input signal, RL = 8Ω
1 10
mV
Po
Output Power
THD = 1% Max, F = 1kHz, RL = 8Ω
375 500
mW
THD + N
Total Harmonic Distortion + Noise
Po = 400mWrms, Av = 2, 20Hz ≤ F ≤ 20kHz, RL = 8Ω
0.1
%
PSRR
Power Supply Rejection Ratio(2)
RL = 8Ω, Av = 2, Vripple = 200mVpp, Input Grounded
F = 217Hz
F = 1kHz
55 61
55 63
dB
Channel Separation, RL = 8Ω
Crosstalk
F = 1kHz
F = 20Hz to 20kHz
-107
-82
dB
TWU Wake-Up Time (Cb = 1µF)
110 140
ms
TSTDB Standby Time (Cb = 1µF)
10 µs
VSTDBH Standby Voltage Level High
1.2 V
VSTDBL Standby Voltage Level Low
0.4 V
ΦM
Phase Margin at Unity Gain
RL = 8Ω, CL = 500pF
65 Degrees
Gain Margin
GM RL = 8Ω, CL = 500pF
15 dB
Gain Bandwidth Product
GBP
RL = 8Ω
1.5 MHz
Gain Bandwidth Product
GBP
RL = 8Ω
1.5 MHz
1. Standby mode is activated when Vstdby is tied to Gnd.
2. All PSRR data limits are guaranteed by production sampling tests.
Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the sinusoidal signal superimposed upon
Vcc
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TS4985
ElectricalwCwhwa.DraatcatSehreiest4tiUc.csom
Figure 20. Power supply rejection ratio (PSRR) Figure 21. Power supply rejection ratio (PSRR)
vs. DC output voltage
vs. DC output voltage
0
Vcc = 5V
-10 Vripple = 200mVpp
RL = 8Ω
-20 Cb = 1µF
AV = 2
-30 Tamb = 25°C
-40
-50
-60
-70
-5 -4 -3 -2 -1 0 1 2 3 4 5
Differential DC Output Voltage (V)
0
Vcc = 5V
-10 Vripple = 200mVpp
RL = 8Ω
Cb = 1µF
-20 AV = 5
Tamb = 25°C
-30
-40
-50
-60
-5 -4 -3 -2 -1 0 1 2 3 4 5
Differential DC Output Voltage (V)
Figure 22. Power supply rejection ratio (PSRR) Figure 23. Power supply rejection ratio (PSRR)
vs. DC output voltage
at f=217Hz vs. bypass capacitor
0
Vcc = 5V
Vripple = 200mVpp
-10 RL = 8Ω
Cb = 1µF
AV = 10
-20 Tamb = 25°C
-30
-40
-50
-5 -4 -3 -2 -1 0 1 2 3 4 5
Differential DC Output Voltage (V)
-30
-40
-50
Av=2
-60 Vcc:
2.6V
3.3V
-70 5V
-80
0.1
Av=10
Vcc:
2.6V
3.3V
5V
Av=5
Vcc:
2.6V
3.3V
5V
Tamb=25°C
1
Bypass Capacitor Cb ( F)
Figure 24. Output power vs. power supply
voltage
Figure 25. Output power vs. power supply
voltage
11/29
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet TS4985.PDF ] | |
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