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PDF S71JL064HA0 Data sheet ( Hoja de datos )
| Número de pieza | S71JL064HA0 | |
| Descripción | Stacked Multi-chip Product (MCP) Flash Memory And Psram CMOS 3.0Volt-only | |
| Fabricantes | Advanced Micro Devices | |
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S71JL128HC0/128HB0/064HB0/
064HA0/064H80
Stacked Multi-Chip Product (MCP) Flash Memory
and pSRAM CMOS 3.0 Volt-only,
Simultaneous Operation Flash Memories and
Static RAM/Pseudo-static RAM
www.DataSheet4U.com
PRELIMINARY
DISTINCTIVE CHARACTERISTICS
MCP Features
Operating Voltage Range of 2.7 to 3.3 V
High Performance
— Access time as fast as 55 ns
Packages
— 73-ball FBGA—8 x 11.6 mm
— 88-ball FBGA—8 x 11.6 mm
Operating Temperatures
— Wireless: –25°C to +85°C
— Industrial: –40°C to +85°C
GENERAL DESCRIPTION
The S71JLxxxH Series is a product line of stacked Multi-Chip
Products (MCP) and consists of
One or more S29JL064H Flash devices
SRAM or pSRAM options
— 8Mb x 8/x 16 SRAM
— 16Mb x 16-only SRAM
— pSRAM x 16 only:
8Mb pSRAM
16Mb pSRAM
32Mb pSRAM
64Mb pSRAM
The products covered by this document are listed below. For
details about their specifications, please refer to the individual
constituent data sheets for further details.
MCP
Number of S29JL064H
Total Flash Density
SRAM/pSRAM Density
S71JL064H80
1
64Mb
8Mb
S71JL064HA0
1
64Mb
16Mb
S71JL064HB0
1
64Mb
32Mb
S71JL128HB0
2
128Mb
32Mb
S71JL128HC0
2
128Mb
64Mb
Notes:
1. This MCP is only guaranteed to operate @ 2.7 - 3.3 V regardless of component operating ranges.
2. BYTE# operation is only supported on the S71JL064H80xx0x.
Publication Number S29JLxxxHxx_00 Revision A Amendment 2 Issue Date February 26, 2004
1 page  
Advance Information
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Table 21. Functional Description .........................................110
Absolute Maximum Ratings (See Note) . . . . . . . 111
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 111
Operating Characteristics (Over Specified Temperature Range) ....... 111
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 112
Timing Test Conditions .................................................................................... 112
Timings .................................................................................................................. 112
Timings .................................................................................................................. 113
Figure 47. Timing of Read Cycle (CE1# = OE# = VIL, WE# = CE2
= VIH) ............................................................................ 113
Figure 48. Timing Waveform of Read Cycle (WE# = VIH) ....... 113
Figure 49. Timing Waveform of Write Cycle (WE# Control) .... 114
Figure 50. Timing Waveform of Write Cycle (CE1# Control, CE2 =
High).............................................................................. 114
16 Mb pSRAM (supplier 4)
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 115
Operation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Absolute Maxumum Ratings (see Note) . . . . . . 116
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 116
Table 22. DC Recommended Operating Conditions ................116
Table 23. DC Characteristics (TA = -25°C to 85°C, VDD = 2.6 to
3.3V) ..............................................................................117
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 117
Table 24. AC Characteristics and Operating Conditions (TA = -25°C
to 85°C, VDD = 2.6 to 3.3V) ...............................................117
Table 25. AC Test Conditions .............................................118
Figure 51. AC Test Loads................................................... 118
Figure 52. State Diagram .................................................. 119
Table 26. Standby Mode Characteristics ..............................119
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . 119
Figure 53. Read Cycle 1—Addressed Controlled .................... 119
Figure 54. Read Cycle 2—CS1# Controlled .......................... 120
Figure 55. Write Cycle 1—WE# Controlled ........................... 120
Figure 56. Write Cycle 2—CS1# Controlled .......................... 121
Figure 57. Write Cycle3—UB#, LB# Controlled ..................... 121
Figure 58. Deep Power-down Mode..................................... 122
Figure 59. Power-up Mode................................................. 122
Figure 60. Abnormal Timing............................................... 122
32 Mb pSRAM (Supplier 3)
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . 123
Operation Mode . . . . . . . . . . . . . . . . . . . . . . . . . 124
Absolute Maxumum Ratings . . . . . . . . . . . . . . . . 124
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 124
Table 27. DC Recommended Operating Conditions (TA = -40°C to
85°C) ............................................................................. 124
Table 28. DC Characteristics (TA = -40°C to 85°C, VDD = 2.6 to
3.3V) ............................................................................. 125
Table 29. Capacitance (TA = 25°C, f = 1 MHz) ..................... 125
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 125
Table 30. AC Characteristics and Operating Conditions (TA = -40°C
to 85°C, VDD = 2.6 to 3.3V) .............................................. 125
Table 31. AC Test Conditions ............................................. 126
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . 127
Figure 61. Read Cycle ...................................................... 127
Figure 62. Page Read Cycle (8 words access) ...................... 128
Figure 63. Write Cycle 1 (WE# controlled) .......................... 129
Figure 64. Write Cycle 2 (CE# controlled) ........................... 130
Figure 65. Deep Power-down Timing .................................. 130
Figure 66. Power-on Timing .............................................. 130
Figure 67. Read Address Skew Provisions ........................... 131
Figure 68. Write Address Skew Provisions ........................... 131
64 Mb pSRAM (supplier 3)
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 132
Operation Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 133
Absolute Maxumum Ratings . . . . . . . . . . . . . . . . 133
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 133
Table 32. DC Recommended Operating Conditions (TA = -25°C to
85°C) ............................................................................. 133
Table 33. DC Characteristics (TA = -25°C to 85°C, VDD = 2.6 to
3.3V) ............................................................................. 134
Table 34. Capacitance (TA = 25°C, f = 1 MHz) ..................... 134
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 134
Table 35. AC Characteristics and Operating Conditions (TA = -25°C
to 85°C, VDD = 2.6 to 3.3V) .............................................. 134
Table 36. AC Test Conditions ............................................. 135
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . 136
Figure 69. Read Cycle ...................................................... 136
Figure 70. Page Read Cycle (8 words access) ...................... 137
Figure 71. Write Cycle 1 (WE# controlled) .......................... 138
Figure 72. Write Cycle 2 (CE# controlled) ........................... 139
Figure 73. Deep Power-down Timing .................................. 139
Figure 74. Power-on Timing .............................................. 139
Figure 75. Read Address Skew Provisions ........................... 140
Figure 76. Write Address Skew Provisions ........................... 140
Revision Summary
February 24, 2004 S71JLxxxHxx_00A0
5
5 Page 
Preliminary
Connection Diagrams
Connection Diagram of S71JL064H80, Model Numbers 01/02
73-Ball FBGA
Top View
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A1 A10
NC NC
B1
B5 B6
B10
NC NC NC NC
C1 C3 C4 C5 C6 C7 C8
NC A7 LB# WP#/ACC WE# A8 A11
D2 D3 D4 D5 D6 D7 D8 D9
A3 A6 UB# RESET# CE2s A19 A12 A15
E2 E3 E4 E5 E6 E7 E8 E9
A2 A5 A18 RY/BY# A20 A9 A13 A21
F1 F2 F3 F4
F7 F8 F9 F10
NC A1 A4 A17
G1 G2 G3 G4
A10 A14 NC NC
G7 G8 G9 G10
NC A0 VSS DQ1
DQ6 SA A16 NC
H2 H3 H4 H5 H6 H7 H8 H9
CE#f OE# DQ9 DQ3 DQ4 DQ13 DQ15/A-1 CIOf
J2 J3 J4 J5 J6 J7 J8 J9
CE1#s DQ0
K3
DQ10
K4
VCCf
K5
VCCs
K6
DQ12
K7
DQ7
K8
VSS
DQ8 DQ2 DQ11 CIOs DQ5 DQ14
L1
L5 L6
L10
NC NC NC NC
M1 M10
NC NC
Flash only
SRAM only
Shared
February 25, 2004 S71JLxxxHxx_00A1
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet S71JL064HA0.PDF ] | |
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