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PDF ACE24LC08 Data sheet ( Hoja de datos )

Número de pieza ACE24LC08
Descripción Two-wire Serial EEPROM
Fabricantes ACE Technology　
Logotipo ACE Technology Logotipo



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No Preview Available ! ACE24LC08 Hoja de datos, Descripción, Manual

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ACE24(L)C02/04/08/16                                                                                                                               
                                              Technology
Two-wire Serial EEPROM
Description
The ACE24(L)C02/04/08/16 provides 2048 / 4096 / 8192 / 16384 bits of serial electrically erasable and
programmable read-only memory (EEPROM) organized as 256/512/1024/2048 words of 8 bits each. The device is
optimized for use in many industrial and commercial applications where low-power and low-voltage
operations are essential.
Features
z Low Operation Voltage:
ACE24C02/04/08/16 : Vcc=2.2V to 5.5V
ACE24LC02/04/08/16 : Vcc=1.7V to 3.6V
z Internally Organized: 266x/(2K), 512x8(4K), 1024x8(8K) or 204/x8(16K)
z Two-wire Serial Interface
z Schmitt Trigger, Filtered Inputs for Noise Suppression
z Bi-directional Data Transfer Protocol
z ACE24C02/04/08/16 :100kHz(2.2V) and 400kHz(5V) Compatibility
ACE24LC02/04/08/16 :1MHz (3.6V,2.7V,2.5V) and 400 kHz (1.7V) Compatibility
z Write Protect Pin for Hardware Data Protection
z 8-byte Page(02), 16-byte Page (04,08,16) Write Modes
z Partial Page Writes are Allowed
z Self-timed Write Cycle (5 ms max)
z High-reliability - Endurance: 1,000,000 Write Cycles
- Data Retention: 100 Years
z PDIP-8,SOP-8,TSSOP-8 ROHS compliant Packages
z Wafer Sales: available in inked wafer Form
Absolute Maximum Ratings
Operating Temperature
Storage Temperature
-55℃ to +125℃
-65℃ to +150℃
Voltage on Any Pin with Respect to Ground
-1.0V to +7.0V
Maximum Operating Voltage ACE24(L)C02/04/08/16
6.25V
DC Output Current
5.0 mA
*Notice: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions beyond those indicated in the operational
sections of this specification are not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
VER 1.3 1 

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ACE24LC08 pdf
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ACE24(L)C02/04/08/16                                                                                                                               
                                              Technology
Two-wire Serial EEPROM
Memory Organization
ACE24(L)C02, 2K SERIAL EEPROM:
Internally organized with 32 pages of 8 bytes each, the 2K requires an 8-bit data word address
for random word addressing.
ACE24(L)C04, 4K SERIAL EEPROM:
Internally organized with 32 pages of 16 bytes each, the 4K requires a 9-bit data word address
for random word addressing.
ACE24(L)C08, 8K SERIAL EEPROM:
Internally organized with 64 pages of 16 bytes each, the 8K requires a 10-bit data word
address for random word addressing.
ACE24(L)C16, 16K SERIAL EEPROM:
Internally organized with 128 pages of 16 bytes each, the 16K requires an 11-bit data word
address for random word addressing.
Pin Capacitance
Applicable over recommended operating range from: TA = 25℃, f = 1.0 MHz, VCC = +2.2V.
Symbol
Test Condition
Max
CI/
1
O
CIN1
Input / Output Capacitance (SDA)
Input Capacitance (A0, A1, A2, SCL)
8
6
Note: 1. This parameter is characterized and is not 100% tested.
Units
pF
pF
Conditions
VI/O = 0V
VIN = 0V
DC Characteristics
ACE24C02/04/08/16
Applicable over recommended operating range from: TA = -40℃ to +85℃, VCC = +2.5V to +5.5V, (unless otherwise noted).
Symbol
Parameter
Test Condition
Min Typ Max Units
VCC Supply Voltage
2.2 5.5 V
ICC1 Supply Current
VCC = 5.0V, Read at 100K
0.4 1.0 mA
ICC2 Supply Current
VCC = 5.0V, Write at 100K
2.0 3.0 mA
ISB1 Standby Current
VCC = 2.2V, VIN = VCC/ VSS
1.0 µA
ISB2 Standby Current
VCC = 5.0V, VIN = VCC/ VSS
6.0 µA
ILI Input Leakage Current
VIN = VCC/VSS
0.10 3.0 µA
ILO
Output Leakage Current
VOUT = VCC/ VSS
0.05 3.0 µA
VIL1 Input Low Level
-0.6 VCCx0.3 V
VIH1 Input High Level
VCCx0.7
VCC+0.5 V
VOL Output Low Level
VCC = 2.7V, IOL = 2.1 mA
0.4 V
VER 1.3 5

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ACE24LC08 arduino
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ACE24(L)C02/04/08/16                                                                                                                               
                                              Technology
Two-wire Serial EEPROM
Acknowledge Polling:
Once the internally timed write cycle has started and the EEPROM inputs are disabled, acknowledge
polling can be initiated. This involves sending a start condition followed by the device address word.
The read/write bit is representative of the operation desired. Only if the internal write cycle has
completed will the EEPROM respond with a zero allowing the read or write sequence to continue.
Read operations are initiated the same way as write operations with the exception that the read/write
select bit in the device address word is set to one. There are three read operations: current address
read, random address read and sequential read.
Current Address Read:
The internal data word address counter maintains the last address accessed during the last read or
write operation, incremented by one. This address stays valid between operations as long as the chip
power is maintained. The address “roll over” during read is from the last byte of the last memory page
to the first byte of the first page. The address “roll over” during write is from the last byte of the current
page to the first byte of the same page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged by
the EEPROM, the current address data word is serially clocked out. The microcontroller does not
respond with an input zero but does generate a following stop condition (refer to Figure 10).
Random Read:
A random read requires a “dummy” byte write sequence to load in the data word address. Once the
device address word and data word address are clocked in and acknowledged by the EEPROM, the
microcontroller must generate another start condition. The microcontroller now initiates a current
address read by sending a device address with the read/write select bit high. The EEPROM
acknowledges the device address and serially clocks out the data word. The microcontroller does not
respond with a zero but does generate a following stop condition (refer to Figure 11).
Sequential Read:
Sequential reads are initiated by either a current address read or a random address read. After the
microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM
receives an acknowledge, it will continue to increment the data word address and serially clock out
sequential data words. When the memory address limit (2K,8K,16K) is reached, the data word address
will “roll over” and the sequential read will continue. The sequential read operation is terminated when
the microcontroller does not respond with a zero but does generate a following stop condition (refer to
Figure 12).
Figure 7．Device Address
VER 1.3 11

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