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PDF ESDALC5-1BT2 Data sheet ( Hoja de datos )
| Número de pieza | ESDALC5-1BT2 | |
| Descripción | Single line low capacitance Transil | |
| Fabricantes | STMicroelectronics | |
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ESDALC5-1BM2, ESDALC5-1BT2
Single line low capacitance Transil™ for ESD protection
Features
■ Single line low capacitance Transil diode
■ Bidirectional ESD protection
■ Breakdown Voltage Vbr = 5 V min.
■ Low diode capacitance (26 pF typ at 0 V)
■ Low leakage current < 50 nA @ 3 V
■ Very small PCB area: 0.6 mm²
Benefits
■ High ESD protection level
■ High integration
■ Suitable for high density boards
■ Lead-free
■ “Halogen-free” according to ECOPACK®2
Complies with the following standards:
■ IEC 61000-4-2 level 4
– 15 kV (air discharge)
– 8 kV (contact discharge)
■ MIL STD 883G - Method 3015-7: class 3
– Human body model
Applications
Where transient overvoltage protection in ESD
sensitive equipment is required, such as:
■ Computers
■ Printers
■ Communication systems
■ Cellular phone handsets and accessories
■ Video equipment
SOD882
ESDALC5-1BM2
SOD882T
ESDALC5-1BT2
Figure 1. Functional diagram
I/O1
I/O2
Description
The ESDALC5-1BM2 and ESDALC5-1BT2 are
bidirectional single line TVS diodes designed to
protect datalines or other I/O ports against ESD
transients.
These devices are ideal for applications where
both reduced line capacitance and board space
saving are required.
February 2010
TM: Transil is a trademark of STMicroelectronics
Doc ID 16936 Rev 1
1/14
www.st.com
14
1 page  
ESDALC5-1BM2, ESDALC5-1BT2
2 Ordering information scheme
Figure 15. Ordering information scheme
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Ordering information scheme
ESD array
Low capacitance
Breakdown voltage
5 = 5 Volts min
Number of lines
Directional
B = Bi-directional
Package
M2 = SOD882
T2 = Thin SOD882
ESDA LC 5 - 1 B x2
Doc ID 16936 Rev 1
5/14
5 Page 
ESDALC5-1BM2, ESDALC5-1BT2
www.DataSheet4U.com
Recommendation on PCB assembly
4.2 Solder paste
1. Halide-free flux qualification ROL0 according to ANSI/J-STD-004.
2. “No clean” solder paste is recommended.
3. Offers a high tack force to resist component movement during high speed.
4. Solder paste with fine particles: powder particle size is 20-45 µm.
4.3 Placement
1. Manual positioning is not recommended.
2. It is recommended to use the lead recognition capabilities of the placement system, not
the outline centering.
3. Standard tolerance of ± 0.05 mm is recommended.
4. 3.5 N placement force is recommended. Too much placement force can lead to
squeezed out solder paste and cause solder joints to short. Too low placement force
can lead to insufficient contact between package and solder paste that could cause
open solder joints or badly centered packages.
5. To improve the package placement accuracy, a bottom side optical control should be
performed with a high resolution tool.
6. For assembly, a perfect supporting of the PCB (all the more on flexible PCB) is
recommended during solder paste printing, pick and place and reflow soldering by
using optimized tools.
4.4 PCB design preference
1. To control the solder paste amount, the closed via is recommended instead of open
vias.
2. The position of tracks and open vias in the solder area should be well balanced. The
symmetrical layout is recommended, in case any tilt phenomena caused by
asymmetrical solder paste amount due to the solder flow away.
Doc ID 16936 Rev 1
11/14
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet ESDALC5-1BT2.PDF ] | |
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