L10C11JC20 Datasheet PDF - LOGIC Devices Incorporated
| Part Number | L10C11JC20 | |
| Description | 4/8-bit Variable Length Shift Register | |
| Manufacturers | LOGIC Devices Incorporated | |
| Logo |  |
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There is a preview and L10C11JC20 download ( pdf file ) link at the bottom of this page. Total 6 Pages | ||
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DEVICES INCORPORATED
DEVICES INCORPORATED
L10C11
L10C114/8-bit Variable Length Shift Register
4/8-bit Variable Length Shift Register
FEATURES
DESCRIPTION
u Variable Length 4 or 8-bit Wide
Shift Register
u Selectable Delay Length from 3 to
18 Stages
u Low Power CMOS Technology
u Replaces Fairchild TMC2011
u Load, Shift, and Hold Instructions
u Separate Data In and Data Out Pins
u Package Styles Available:
• 24-pin Plastic DIP
• 28-pin Plastic LCC, J-Lead
The L10C11 is a high-speed, low
power CMOS variable length shift
register. The L10C11 consists of two
4-bit wide, adjustable length shift
registers. These registers share control
signals and a common clock. Both
shift registers can be programmed
together to any length from 3 to 18
stages inclusive, or one register can be
fixed at 18 stages of delay while the
other is variable. The configuration
implemented is determined by the
Length Code (L3-0) and the MODE
control line as shown in Table 1.
Each input is applied to a chain of
registers which are clocked on the
rising edge of the common CLK input.
These registers are numbered R1
through R17 and R1’ through R17’,
corresponding to the D3-0 and D7-4
data fields respectively. A multi-
plexer serves to route the contents of
any of registers R2 through R17 to the
output register, denoted R18. A
similar multiplexer operates on the
contents of R2’ through R17’ to load
R18’. Note that the minimum-length
path from data inputs to outputs is R1
to R2 to R18, consisting of three stages
of delay.
The MODE input determines whether
one or both of the internal shift
registers have variable length. When
MODE = 0, both D3-0 and D7-4 are
delayed by an amount which is
controlled by L3-0. When MODE = 1,
the D7-4 field is delayed by 18 stages
independent of L3-0.
The Length Code (L3-0) controls the
number of stages of delay applied to
the D inputs as shown in Table 1.
When the Length Code is 0, the inputs
are delayed by 3 clock periods. When
the Length Code is 1, the delay is 4
clock periods, and so forth. The
Length Code and MODE inputs are
latched on the rising edge of CLK.
Both the Length Code and MODE
values may be changed at any time
without affecting the contents of
registers R1 through R17 or R1’
through R17’.
L10C11 BLOCK DIAGRAM
D3-0
CLK
L3-0
4
4
R17
R16
R15
4
Y3-0
R4
R3
R2
MODE
D7-4
4
R17’
R16’
R15’
R4’
R3’
R2’
4
Y7-4
Pipeline Registers
1 03/27/2000–LDS.11-L
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DEVICES INCORPORATED
ORDERING INFORMATION
24-pin — 0.3" wide
D0
D1
D2
D3
L0
L1
VCC
CLK
D4
D5
D6
D7
1 24
2 23
3 22
4 21
5 20
6 19
7 18
8 17
9 16
10 15
11 14
12 13
Y0
Y1
Y2
Y3
L2
L3
GND
MODE
Y4
Y5
Y6
Y7
Speed
Plastic DIP
(P2)
0°C to +70°C — COMMERCIAL SCREENING
20 ns
15 ns
L10C11PC20
L10C11PC15
–55°C to +125°C — COMMERCIAL SCREENING
L10C11
4/8-bit Variable Length Shift Register
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Plastic DIP
(P1)
–55°C to +125°C — MIL-STD-883 COMPLIANT
Pipeline Registers
5 03/27/2000–LDS.11-L
Preview 5 Page |
Part DetailsOn this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for L10C11JC20 electronic component. |
| Information | Total 6 Pages | |
| Link URL | [ Copy URL to Clipboard ] | |
| Download | [ L10C11JC20.PDF Datasheet ] | |
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| L10C11JC20 | The function is 4/8-bit Variable Length Shift Register. LOGIC Devices Incorporated | |
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