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PDF 71M6543GH Data sheet ( Hoja de datos )
| Número de pieza | 71M6543GH | |
| Descripción | Energy Meter ICs | |
| Fabricantes | Teridian Semiconductor | |
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A Maxim Integrated Products Brand
19-5375; Rev 1.2; 4/11
71M6543F/H and 71M6543G/GH
Energy Meter ICs
DATA SHEET
April 2011
GENERAL DESCRIPTION
FEATURES
The 71M6543F, 71M6543H, 71M6543G, and 71M6543GH are
Teridian’s 4th-generation polyphase metering systems-on-chips
(SoCs) with a 5MHz 8051-compatible MPU core, low-power real-
time clock (RTC) with digital temperature compensation, flash
memory, and LCD driver. Our Single Converter Technology® with
a 22-bit delta-sigma ADC, seven analog inputs, digital metrology
temperature compensation, precision voltage reference, and a 32-
bit computation engine (CE) supports a wide range of metering
applications with very few external components.
The 71M6543F, 71M6543H, 71M6543G and 71M6543GH support
optional interfaces to the 71M6xx3 series of isolated sensors that
offer BOM cost reduction, immunity to magnetic tamper, and
enhanced reliability. The ICs feature ultra-low-power operation in
active and battery modes, 5KB shared RAM, and 64KB
(71M6543F, 71M6543H) or 128KB (71M6543G, 71M6543GH) of
flash memory, which can be programmed with code and/or data
during meter operation. High processing and sampling rates
combined with differential inputs offer a powerful metering platform
for commercial and industrial meters with up to class 0.2 accuracy
(71M6543H, 71M6543GH).
A complete array of code development tools, demonstration code,
and reference designs enable rapid development and certification of
meters that meet all ANSI and IEC electricity metering standards
worldwide.
• 0.1% Accuracy Over 2000:1 Current Range
• Exceeds IEC 62053/ANSI C12.20 Standards
• Seven Sensor Inputs with Neutral Current
Measurement, Differential Mode Selectable
for Current Inputs
• Selectable Gain of 1 or 8 for One Current
Input to Support Shunts
• High-Speed Wh/VARh Pulse Outputs with
Programmable Width
• 64KB Flash, 5KB RAM (71M6543F/H)
• 128KB Flash, 5KB RAM (71M6543G/GH)
• Up to Four Pulse Outputs with Pulse Count
• Four-Quadrant Metering, Phase Sequencing
• Digital Temperature Compensation:
Metrology Compensation
Accurate RTC for TOU Functions with
Automatic Temperature Compensation
for Crystal in All Power Modes
• Independent 32-Bit Compute Engine
• 46-64Hz Line Frequency Range with the Same
Calibration
Shunt Current Sensors
C
NEUTRAL
B
A
LOAD
www.DataSheet4U.net
POWER SUPPLY
NEUTRAL
Note: This system is referenced to Neutral
3x TERIDIAN
71M6xx3
Pulse Transformers
AMR
IR
HOST
MUX and ADC
IADC0
IADC1
}IN*
VADC10 (VC)
IADC6
IADC7
}IC
VADC9 (VB)
IADC4
IADC5
}IB
VADC8 (VA)
IADC2
IADC3
}IA
V3P3A V3P3SYS GNDA GNDD
TERIDIAN
PWR MODE
CONTROL
71M6543F/ WAKE-UP
71M6543H/ REGULATOR
71M6543G/
VBAT
71M6543GH VBAT_RTC
TEMPERATURE BATTERY
SENSOR
MONITOR
VREF
SERIAL PORTS
TX
RX
MODUL- RX
ATOR TX
POWER FAULT
COMPARATOR
SPI INTERFACE
RAM
COMPUTE
ENGINE
FLASH
MEMORY
MPU
RTC
TIMERS
ICE
COM0...5
SEG
SEG/DIO
LCD DRIVER
DIO, PULSES
DIO
V3P3D
OSCILLATOR/
PLL XIN
XOUT
*IN = Neutral Current
9/17/2010
BATTERY
RTC
BATTERY
LCD DISPLAY
8888.8888
PULSES,
DIO
I2C or µWire
EEPROM
32 kHz
Single Converter Technology is a registered trademark of Maxim Integrated
Products, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
• Phase Compensation (±7°)
• Three Battery-Backup Modes:
Brownout Mode
LCD Mode
Sleep Mode
• Wake-Up on Pin Events and Wake-on-Timer
• 1µA in Sleep Mode
• Flash Security
• In-System Program Update
• 8-Bit MPU (80515), Up to 5MIPS
• Full-Speed MPU Clock in Brownout Mode
• LCD Driver:
6 Common Segment Drivers
Up to 56 Selectable Pins
• Up to 51 Multifunction DIO Pins
• Hardware Watchdog Timer (WDT)
• I2C/MICROWIRE™ EEPROM Interface
• SPI Interface with Flash Program Capability
• Two UARTs for IR and AMR
• IR LED Driver with Modulation
• Industrial Temperature Range
• 100-Pin Lead-Free LQFP Package
v1.2 © 2008–2011 Teridian Semiconductor Corporation 1
1 page  
71M6543F/H and 71M6543G/GH Data Sheet
Figures
Figure 1: IC Functional Block Diagram.....................................................................................................9
Figure 2: AFE Block Diagram (Shunts: One-Local, Three-Remotes) ...................................................... 12
Figure 3. AFE Block Diagram (Four CTs)............................................................................................... 13
Figure 4: States in a Multiplexer Frame (MUX_DIV[3:0] = 6) .................................................................. 17
Figure 5: States in a Multiplexer Frame (MUX_DIV[3:0] = 7) .................................................................. 17
Figure 6: General Topology of a Chopped Amplifier............................................................................... 21
Figure 7: CROSS Signal with CHOP_E = 00........................................................................................... 21
Figure 8: RTM Timing ............................................................................................................................ 26
Figure 9. Pulse Generator FIFO Timing ................................................................................................. 28
Figure 10: Samples from Multiplexer Cycle (Frame)............................................................................... 29
Figure 11: Accumulation Interval............................................................................................................ 29
Figure 12: Interrupt Structure................................................................................................................. 46
Figure 13: Automatic Temperature Compensation ................................................................................. 54
Figure 14: Optical Interface.................................................................................................................... 58
Figure 15: Optical Interface (UART1) ..................................................................................................... 58
Figure 16: Connecting an External Load to DIO Pins ............................................................................. 60
Figure 17: LCD Waveforms ................................................................................................................... 65
Figure 18: 3-wire Interface. Write Command, HiZ=0.............................................................................. 67
Figure 19: 3-wire Interface. Write Command, HiZ=1.............................................................................. 68
Figure 20: 3-wire Interface. Read Command......................................................................................... 68
Figure 21: 3-Wire Interface. Write Command when CNT=0................................................................... 68
Figure 22: 3-wire Interface. Write Command when HiZ=1 and WFR=1.................................................. 68
Figure 23: SPI Slave Port - Typical Multi-Byte Read and Write operations.............................................. 70
Figure 24: Voltage, Current, Momentary and Accumulated Energy......................................................... 75
Figure 25: Operation Modes State Diagram ........................................................................................... 76
Figure 26: MPU/CE Data Flow............................................................................................................... 85
Figure 27: Resistive Voltage Divider (Voltage Sensing).......................................................................... 86
Figure 28. CT with Single-Ended Input Connection (Current Sensing).................................................... 86
Figure 29: CT with Differential Input Connection (Current Sensing) ........................................................ 86
Figure 30: Differential Resistive Shunt Connections (Current Sensing)................................................... 86
Figure 31: System Using Three-Remotes and One-Local (Neutral) Sensor ............................................ 87
Figure 32. System Using Current Transformers ..................................................................................... 88
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Figure 33: I2C EEPROM Connection...................................................................................................... 94
Figure 34: Connections for UART0 ........................................................................................................ 94
Figure 35: Connection for Optical Components...................................................................................... 95
Figure 36: External Components for the RESET Pin: Push-Button (Left), Production Circuit (Right) ....... 96
Figure 37: External Components for the Emulator Interface ................................................................... 96
Figure 38. Trim Fuse Bit Mapping ........................................................................................................ 118
Figure 39: CE Data Flow: Multiplexer and ADC.................................................................................... 131
Figure 40: CE Data Flow: Scaling, Gain Control, Intermediate Variables for one Phase........................ 131
Figure 41: CE Data Flow: Squaring and Summation Stages................................................................. 132
Figure 42: Wh Error from 200 A to 0.1 A at 60 Hz, 240 VAC ......................Error! Bookmark not defined.
Figure 43: VARh Error from 200 A to 0.1 A at 60 Hz, 240 VAC...................Error! Bookmark not defined.
Figure 44: Wh Error from 200 A to 0.1 A at Various Frequencies (0° Load angle, 240 VAC)............. Error!
Bookmark not defined.
Figure 45: 100-pin LQFP Package Outline........................................................................................... 148
Figure 46: Pinout for the LQFP-100 Package....................................................................................... 149
Figure 47: I/O Equivalent Circuits......................................................................................................... 154
v1.2
© 2008–2011 Teridian Semiconductor Corporation
5
5 Page 
71M6543F/H and 71M6543G/GH Data Sheet
2 Hardware Description
2.1 Hardware Overview
The Teridian 71M6543 single-chip energy meter integrates all primary functional blocks required to
implement a solid-state electricity meter. Included on the chip are:
• An analog front-end (AFE) featuring a 22-bit second-order sigma-delta ADC
• An independent 32-bit digital computation engine (CE) to implement DSP functions
• An 8051-compatible microprocessor (MPU) which executes one instruction per clock cycle (80515)
• A precision voltage reference (VREF)
• A temperature sensor for digital temperature compensation of:
- Metrology (MPU)
- Automatic RTC in all power states
- MPU assisted RTC compensation
• LCD Driver
• RAM and Flash memory
• A real time clock (RTC)
• A variety of I/O pins
• A power failure interrupt
• A zero-crossing interrupt
• Selectable current sensor interfaces for locally-connected sensors as well as isolated sensors (i.e.,
using the 71M6xx3 companion IC with a shunt resistor sensor)
• Resistive Shunt and Current Transformers are supported
In order to implement a polyphase meter with or without neutral current sensing, one resistive shunt
current sensor may be connected directly (non-isolated) to the 71M6543 device, while up to three
additional current shunts are isolated using a companion 71M6xx3 isolated sensor IC. An inexpensive,
small size pulse transformer is used to electrically isolate the 71M6xx3 remote sensor from the 71M6543.
The 71M6543 performs digital communications bi-directionally with the 71M6xx3 and also provides power
to the 71M6xx3 through the isolating pulse transformer. Isolated (remote) shunt current sensors are
connected to the differential input of the 71M6xx3. The 71M6543 may also be used with Current
Transformers; in this case the 71M6xx3 isolated sensors are not required. Included on the 71M6xx3
companion isolator chip are:
• Digital isolation communications interface
• An analog front-end (AFE) featuring a 22-bit second-order sigma-delta ADC
•www.DataSheet4U.net A precision voltage reference (VREF)
• A temperature sensor (for current-sensing digital temperature compensation)
• A fully differential shunt resistor sensor input
• A pre-amplifier to optimize shunt current sensor performance
• Isolated power circuitry obtains dc power from pulses sent by the 71M6543
In a typical application, the 32-bit compute engine (CE) of the 71M6543 sequentially processes the
samples from the voltage inputs on analog input pins and performs calculations to measure active energy
(Wh) and reactive energy (VARh), as well as A2h, and V2h for four-quadrant metering. These measurements
are then accessed by the MPU, processed further and output using the peripheral devices available to the
MPU.
In addition to advanced measurement functions, the real time clock (RTC) function allows the 71M6543 to
record time of use (TOU) metering information for multi-rate applications and to time-stamp tamper or other
events. An automatic RTC temperature compensation circuit operates in all power states including when the
MPU is halted, and continues to compensate using back-up battery power during power outages.
Measurements can be displayed on 3.3 V LCDs commonly used in low-temperature environments. The
integrated charge pump and temperature sensor can be used by the MPU to enhance 3.3 V LCD
performance at cold temperatures. The on-chip charge pump may also drive 5 V LCDs. Flexible mapping of
LCD display segments facilitates the integration of existing custom LCDs. Design trade-off between the
v1.2
© 2008–2011 Teridian Semiconductor Corporation
11
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet 71M6543GH.PDF ] | |
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