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Número de pieza | 3N165 | |
Descripción | Amplifier | |
Fabricantes | Micross | |
Logotipo | ||
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No Preview Available ! 3N165
P-CHANNEL MOSFET
The 3N165 is a monolithic dual enhancement mode P-Channel Mosfet
The 3N165 is a dual enhancement mode P-Channel
Mosfet and is ideal for space constrained applications
and those requiring tight electrical matching.
FEATURES
DIRECT REPLACEMENT FOR INTERSIL 3N165
ABSOLUTE MAXIMUM RATINGS1@ 25°C (unless otherwise noted)
The hermetically sealed TO-78 package is well suited
for high reliability and harsh environment applications.
Maximum Temperatures
Storage Temperature
Operating Junction Temperature
‐65°C to +200°C
‐55°C to +150°C
(See Packaging Information).
Lead Temperature (Soldering, 10 sec.)
Maximum Power Dissipation
+300°C
3N165 Features:
Continuous Power Dissipation (one side)
Total Derating above 25°C
300mW
4.2 mW/°C
Very high Input Impedance
Low Capacitance
MAXIMUM CURRENT
Drain Current
50mA
High Gain
High Gate Breakdown Voltage
Low Threshold Voltage
MAXIMUM VOLTAGES
Drain to Gate or Drain to Source2
Peak Gate to Source3
‐40V
±125V
Gate‐Gate Voltage
±80V
3N165 ELECTRICAL CHARACTERISTICS @ 25°C (unless otherwise noted)
SYMBOL
CHARACTERISTIC
MIN TYP.
MAX
UNITS
CONDITIONS
IGSSR
Gate Reverse Leakage Current
‐‐
‐‐
10
IGSSF
Gate Forward Current
‐‐ ‐‐ ‐10
TA= +125°C
‐‐
‐‐
‐25
pA
VGS = ‐0V
VGS = ‐40V
IDSS
Drain to Source Leakage Current
‐‐
‐‐ ‐200
VDS = ‐20V
ISDS
Source to Drain Leakage Current
‐‐
‐‐ ‐400
VSD = ‐20V VDB = 0
ID(on)
Drain Current “On”
‐5.0 ‐‐
‐30
mA
VDS = ‐15V, VGS = ‐10V
VGS(th)
Gate to Source Threshold Voltage ‐2.0
‐‐
‐5.0
V
VDS = ‐15V, ID = ‐10µA
‐2.0 ‐‐
‐5.0
VDS = VGS , ID = ‐10µA
rDS(on)
Drain to Source “On” Resistance
‐‐
‐‐
300
Ω
VGS = ‐20V, ID = ‐100µA
gfs
Forward Transconductance
1500
gos
Output Admittance
‐‐
Ciss
Input Capacitance
‐‐
ClickCrss
Reverse Transfer Capacitance
‐‐
Coss
Output Capacitance
‐‐
RE(Yfs)
Common Source Forward
1200
Transconductance
To‐‐ 3000
‐‐ 300
‐‐ 3
‐‐ 0.7
‐‐ 3.0
‐‐ ‐‐
BuyµS VDS = ‐15V, ID = ‐10mA , f = 1kHz
pF VDS = ‐15V, ID = ‐10mA , f = 1MHz4
µS VDS = ‐15V, ID = ‐10mA , f = 100MHz4
MATCHING CHARACTERISTICS 3N165
SYMBOL
LIMITS
Yfs1/Yfs2
CHARACTERISTIC
Forward Transconductance Ratio
MIN
0.90
MAX
1.0
UNITS
ns
CONDITIONS
VDS = ‐15V, ID = ‐500µA , f = MHz4
VGS1‐2
Gate Source Threshold Voltage
Differential
‐‐ 100
mV
VDS = ‐15V, ID = ‐500µA
∆VGS1‐2/∆T
Gate Source Threshold Voltage
‐‐ 100 µV/°C
Differential Change with Temperature
VDS = ‐15V, ID = ‐500µA
TA = ‐55°C to = +25°C
N o t e 1 ‐ A b s o l u t e m aSxWimIuTmCH raINtinGg sT EarSeT l iCmIRitiCnUg IvTa lues above which 3N165 serviceability may be impaired. *
SWITCHING WAVEFORM & TEST CIRCUIT
Note 2 – Per Transistor
Note 3 – Device must not be tested at ±125V more than once or longer than 300ms.
Note 4 – For design reference only, not 100% tested
Available Packages:
Device Schematic
TO-78 (Bottom View)
3N165 in TO-72
3N165 in bare die.
Please contact Micross for full
package and die dimensions
Tel: +44 1603 788967
Email: [email protected]
Web: http://www.micross.com/distribution
*To avoid possible damage to the device while wiring, testing, or in actual
operation, follow these procedures: To avoid the build‐up of static charge, the
leads of the devices should remain shorted together with a metal ring except
when being tested or used. Avoid unnecessary handling. Pick up devices by the
case instead of the leads. Do not insert or remove devices from circuits with the
power on, as transient voltages may cause permanant damage to the devices.
Information furnished by Linear Integrated Systems and Micross Components is believed to be accurate and reliable. However, no responsibility is assumed for its use; nor for any infringement of patents or
other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Linear Integrated Systems.
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