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Analog Devices - 170 MSPS/210 MSPS/250 MSPS Serial Output 1.8 V ADC

Numéro de référence AD9239
Description 170 MSPS/210 MSPS/250 MSPS Serial Output 1.8 V ADC
Fabricant Analog Devices 
Logo Analog Devices 





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AD9239 fiche technique
Data Sheet
Quad, 12-Bit, 170 MSPS/210 MSPS/250 MSPS
Serial Output 1.8 V ADC
AD9239
FEATURES
4 ADCs in 1 package
Coded serial digital outputs with ECC per channel
On-chip temperature sensor
−95 dB channel-to-channel crosstalk
SNR = 65 dBFS with AIN = 85 MHz at 250 MSPS
SFDR = 77 dBc with AIN = 85 MHz at 250 MSPS
Excellent linearity
DNL = ±0.3 LSB (typical)
INL = ±0.7 LSB (typical)
780 MHz full power analog bandwidth
Power dissipation = 380 mW per channel at 250 MSPS
1.25 V p-p input voltage range, adjustable up to 1.5 V p-p
1.8 V supply operation
Clock duty cycle stabilizer
Serial port interface features
Power-down modes
Digital test pattern enable
Programmable header
Programmable pin functions (PGMx, PDWN)
APPLICATIONS
Communication receivers
Cable head end equipment/M-CMTS
Broadband radios
Wireless infrastructure transceivers
Radar/military-aerospace subsystems
Test equipment
GENERAL DESCRIPTION
The AD9239 is a quad, 12-bit, 250 MSPS analog-to-digital
converter (ADC) with an on-chip temperature sensor and a
high speed serial interface. It is designed to support digitizing
high frequency, wide dynamic range signals with an input
bandwidth up to 780 MHz. The output data are serialized and
presented in packet format, consisting of channel-specific
information, coded samples, and error correction code.
The ADC requires a single 1.8 V power supply and the input
clock may be driven differentially with a sine wave, LVPECL,
TTL, or LVDS. A clock duty cycle stabilizer allows high
performance at full speed with a wide range of clock duty
cycles. The on-chip reference eliminates the need for external
decoupling and can be adjusted by means of SPI control.
Various power-down and standby modes are supported. The
ADC typically consumes 145 mW per channel with the digital
link still in operation when standby operation is enabled.
FUNCTIONAL BLOCK DIAGRAM
AVDD
PDWN
DRVDD
DRGND
VIN + A
VIN – A
VCM A
VIN + B
VIN – B
VCM B
VIN + C
VIN – C
VCM C
VIN + D
VIN – D
VCM D
RBIAS
TEMPOUT
AD9239
BUF SHA
PIPELINE
ADC
12
DOUT + A
CHANNEL A
DOUT – A
BUF SHA
PIPELINE
ADC
12
DOUT + B
CHANNEL B
DOUT – B
BUF SHA
PIPELINE
ADC
12
DOUT + C
CHANNEL C
DOUT – C
BUF SHA
PIPELINE
ADC
12
DOUT + D
CHANNEL D
DOUT – D
REFERENCE
SERIAL
PORT
DATA RATE
MULTIPLIER
PGM3
PGM2
PGM1
PGM0
RESET
SCLK SDI/ SDO CSB
SDIO
CLK+ CLK–
Figure 1.
Fabricated on an advanced CMOS process, the AD9239 is avail-
able in a Pb-free/RoHS-compliant, 72-lead LFCSP package. It is
specified over the industrial temperature range of −40°C to +85°C.
PRODUCT HIGHLIGHTS
1. Four ADCs are contained in a small, space-saving package.
2. An on-chip PLL allows users to provide a single ADC
sampling clock, and the PLL distributes and multiplies up
to produce the corresponding data rate clock.
3. Coded data rate supports up to 4.0 Gbps per channel.
Coding includes scrambling to ensure proper dc common
mode, embedded clock, and error correction.
4. The AD9239 operates from a single 1.8 V power supply.
5. Flexible synchronization schemes and programmable
mode pins.
6. On-chip temperature sensor.
Rev. E
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2008–2014 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

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