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PDF JMF662 Data sheet ( Hoja de datos )

Número de pieza JMF662
Descripción SATA III to Flash controller
Fabricantes JMicron 
Logotipo JMicron Logotipo



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No Preview Available ! JMF662 Hoja de datos, Descripción, Manual

JMF662
JMF662
SATA III to Flash controller
Overview
JMF662 is a single chip, supports external SDRAM, SATA III to NAND flash interface. It is native design to provide
higher bandwidth for flash memory access.
JMF662 can support the maximum read and write speed to drive the limit of flash memory. JMF662 has the best
supporting to the latest NAND flash memory, including Toshiba 32nm/24nm HBL/ABL Flash. It also provides the
embedded hardware error correction code (ECC), wear leveling, and bad block management technology in this chip. In
order to resolve compatibility issue, JMF662 provides the on line firmware upgrade ability.
JMF662 provides embedded processor, internal masked ROM, data SRAM, SATA link/transport layer, SATA PHY. Data
swap between different interfaces can be done very efficiency by DMA without CPU involvement. Based on the efficient
architecture, the JMF662 can provide the best performance.
Features
Compliance
Compliant with Serial ATA International Organization: Serial ATA Revision 2.6.
SATAI\II
www.DataSheet.co.kr
Supports 1-port 1.5/3.0/6.0Gbps SATA I/II/III interface.
CPU
Embedded data buffer.
32bits Embedded processor.
32 KBytes Embedded masked program ROM.
128 KBytes Embedded system RAM.
Flash
Support maximum 16CE’s Flash per channel.
Support 32/24 nm Flash.
Support legacy/toggle mode Flash
Enhanced endurance by dynamic/static wear-leveling.
Supports 4K/8K/16K bytes page size.
Supports dynamic power management.
SMART (Self-Monitoring, Analysis and Reporting Technology).
Data integrity under power-cycling.
Supports online SATA firmware update.
Version B.1.0
© JMicron 2012. All rights reserved.
Page 2
Mar..2012
Copying prohibited.
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