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PDF K521F12ACD-B060 Data sheet ( Hoja de datos )
| Número de pieza | K521F12ACD-B060 | |
| Descripción | 1Gb (128M x8) NAND Flash + 512Mb (32M x16) Mobile DDR SDRAM | |
| Fabricantes | Samsung | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de K521F12ACD-B060 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Rev. 0.0, Nov. 2009
K521F12ACD-B060
Preliminary
MCP Specification
1Gb (128M x8) NAND Flash + 512Mb (32M x16) Mobile DDR SDRAM
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datasheet
SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND
SPECIFICATIONS WITHOUT NOTICE.
Products and specifications discussed herein are for reference purposes only. All information discussed
herein is provided on an "AS IS" basis, without warranties of any kind.
This document and all information discussed herein remain the sole and exclusive property of Samsung
Electronics. No license of any patent, copyright, mask work, trademark or any other intellectual property
right is granted by one party to the other party under this document, by implication, estoppel or other-
wise.
Samsung products are not intended for use in life support, critical care, medical, safety equipment, or
similar applications where product failure could result in loss of life or personal or physical harm, or any
military or defense application, or any governmental procurement to which special terms or provisions
may apply.
For updates or additional information about Samsung products, contact your nearest Samsung office.
All brand names, trademarks and registered trademarks belong to their respective owners.
ⓒ 2009 Samsung Electronics Co., Ltd. All rights reserved.
-1-
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
datasheetK521F12ACD-B060
3. Pin Configuration
Preliminary Rev. 0.0
MCP Memory
- 1 2 3 4 5 6 7 8 9 10
A-
DNU
-
-
-
-
-
-
DNU
DNU
B DNU
NC
DQ0d
VDDd
VSSn
VCCn
NC
A3d
NC
DNU
C
-
VSSd
DQ2d
DQ1d
CLEn
/CEn
A0d
A1d
A2d
-
D
-
VDDQd DQ4d
DQ3d
ALEn
/WEn
BA0d
BA1d
A10d
-
E
-
VSSQd DQ6d
DQ5d
/REn
R/Bn
/RASd
NC
/CSd
-
F
-
VDDQd LDQSd DQ7d
/WPn
NC
/CASd
/WEd
VSSd
-
G-
VSSd
LDMd
/CKd
NC
NC
A12d
CKEd
VDDd
-
H
-
VDDd
UDMd
CKd
NC
NC A8d A9d A11d
-
J
-
VSSQd UDQSd DQ8d
IO0n
IO2n
IO4n
IO6n
A7d
-
K
-
VDDQd DQ9d DQ10d
NC
NC
NC
NC A6d
-
L
-
VSSQd DQ11d DQ12d
IO1n
IO3n
IO5n
IO7n
A5d
-
M-
VDDd DQ13d DQ14d
NC
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NC
NC
NC
N DNU
NC
DQ15d VSSd
VSSn VCCQn VCCn
VSSn
A4d
NC
-
DNU
P DNU
DNU
-
-
-
-
-
-
DNU
DNU
107 FBGA: Top View (Ball Down)
NAND Flash
Mobile DRAM
Power
Ground
NC/DNU
-5-
Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
datasheetK521F12ACD-B060
Preliminary Rev. 0.0
MCP Memory
Figure 1. Functional Block Diagram (x8)
VCC
VSS
A12 - A27
X-Buffers
Latches
& Decoders
1,024M + 32M Bit for 1Gb
NAND Flash
ARRAY
A0 - A11
Y-Buffers
Latches
& Decoders
Data Register & S/A
Y-Gating
Command
Command
Register
CE Control Logic
RE & High Voltage
WE Generator
CLE ALE WP
I/O Buffers & Latches
Global Buffers
Output
Driver
VCC
VSS
I/0 0
I/0 7
Figure 2. Array Organization (x8)
1 Block = 64 Pages
(128K + 4K) Byte
1,024 blocks for 1Gb
2K Bytes
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64 Bytes
1 Page = (2K + 64)Bytes
1 Block = (2K + 64)Byte x 64 Pages
= (128K + 4K) Bytes
1 Device = (2K+64)B x 64Pages x 1,024 Blocks
= 1,056 Mbits for 1Gb
8 bit
Page Register
2K Bytes
I/O 0 ~ I/O 7
64 Bytes
1st Cycle
2nd Cycle
3rd Cycle
4th Cycle
I/O 0
A0
A8
A12
A20
I/O 1
A1
A9
A13
A21
I/O 2
A2
A10
A14
A22
Table 1. Array address : (x8)
I/O 3
I/O 4
I/O 5
A3 A4 A5
A11 *L
*L
A15 A16 A17
A23 A24 A25
NOTE :
Column Address : Starting Address of the Register.
* L must be set to "Low".
* The device ignores any additional input of address cycles than required.
I/O 6
A6
*L
A18
A26
I/O 7
A7
*L
A19
A27
Address
Column Address
Column Address
Row Address
Row Address
- 11 -
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