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PDF AT24CS04 Data sheet ( Hoja de datos )
| Número de pieza | AT24CS04 | |
| Descripción | (AT24CS04 / AT24CS08) EEPROM | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Atmel AT24CS04 and AT24CS08
I2C-Compatible (2-wire) Serial EEPROM with a
Unique, Factory Programmed 128-bit Serial Number
4-Kbit (512 x 8), 8-Kbit (1024 x 8)
PRELIMINARY DATASHEET
Standard Features
Low-voltage operation
VCC = 1.7V to 5.5V
Internally organized as 512 x 8 (4-Kbit) or 1024 x 8 (8-Kbit)
I2C-compatible (2-wire) serial interface
Schmitt Trigger, filtered inputs for noise suppression
Bidirectional data transfer protocol
400kHz (1.7V) and 1MHz (2.5V, 2.7, 5.0V) compatibility
Write Protect pin for hardware data protection
16-byte page write mode
Partial page writes allowed
Self-timed write cycle (5ms max)
High-reliability
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Endurance: 1,000,000 write cycles
Data retention: 100 years
Green package options (Pb/Halide-free/RoHS-compliant)
8-lead JEDEC SOIC, 8-lead TSSOP, 8-pad UDFN, and 5-lead SOT23
Die sale options: wafer form and tape and reel available
Enhanced Features in the CS Serial EEPROM Series
All standard features supported
128-bit unique factory-programmed serial number
Permanently locked, read-only value
Stored in a separate memory area
Guaranteed unique across entire CS Series of Serial EEPROMs
8766A–SEEPR–6/12
Datasheet pdf - http://www.DataSheet4U.co.kr/
1 page  
6. Memory Organization
Atmel AT24CS04, 4K Serial EEPROM: Internally organized with 32 pages of 16 bytes each, the 4-Kbit device requires
a 9-bit data word address for random word addressing.
Atmel AT24CS08, 8K Serial EEPROM: Internally organized with 64 pages of 16 bytes each, the 8-Kbit device requires
a 10-bit data word address for random word addressing.
Table 6-1. Pin Capacitance(1)
Applicable over recommended operating range from TA = 25°C, f = 1.0MHz, VCC = 1.7V to 5.5V
Symbol Test Condition
Max Units
CI/O Input/Output Capacitance (SDA)
CIN Input Capacitance (A1, A2, SCL)
8 pF
6 pF
Note: 1. This parameter is characterized and is not 100% tested.
Conditions
VI/O = 0V
VIN = 0V
Table 6-2. DC Characteristics
Applicable over recommended operating range from: TAI = -40C to +85C, VCC = 1.7V to 5.5V (unless otherwise noted)
Symbol Parameter
Test Condition
Min Typ Max Units
VCC
ICC1
ICC2
ISB1
ISB2
ILI
ILO
VIL
VIH
VOL1
VOL2
Supply Voltage
Supply Current VCC = 5.0V
Supply Current VCC = 5.0V
Standby Current VCC = 1.7V
Standby Current VCC = 5.5V
Input Leakage Current
Output Leakage Current
Input Low Level(1)
Input High Level(1)
Output Low Level VCC = 1.7V
Output Low Level VCC = 3.0V
Read at 400kHz
Write at 400kHz
VIN = VCC or VSS
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VIN = VCC or VSS
VIN = VCC or VSS
VOUT = VCC or VSS
IOL = 0.15mA
IOL = 2.1mA
1.7
–0.6
VCC x 0.7
0.4
2.0
0.10
0.05
5.5
1.0
3.0
1.0
6.0
3.0
3.0
VCC x 0.3
VCC + 0.5
0.2
0.4
V
mA
mA
μA
μA
μA
μA
V
V
V
V
Note: 1. VIL min and VIH max are reference only and are not tested.
Atmel AT24CS04/08 [PRELIMINARY DATASHEET]
8766A–SEEPR–6/12
5
Datasheet pdf - http://www.DataSheet4U.co.kr/
5 Page 
9. Write Operations
Byte Write: A Byte Write operation requires an 8-bit word address following the device address word and
acknowledgment. Upon receipt of this address, the EEPROM will again respond with a zero and then clock in the first
8-bit data word. Following receipt of the 8-bit data word, the EEPROM will output a zero and the addressing device, such
as a microcontroller, must terminate the write sequence with a Stop condition. At this time the EEPROM enters an
internally timed write cycle, tWR, to the nonvolatile memory. All inputs are disabled during this write cycle and the
EEPROM will not respond until the Write is complete (see Figure 10-1 on page 12).
Page Write: The 4-Kbit and 8-Kbit devices are capable of 16-byte Page Writes. A Page Write is initiated in the same way
as a Byte Write, but the microcontroller does not send a Stop condition after the first data word is clocked in. Instead,
after the EEPROM acknowledges receipt of the first data word, the microcontroller can transmit up to fifteen additional
data words. The EEPROM will respond with a zero after each data word received. The microcontroller must terminate the
Page Write sequence with a Stop condition (see Figure 10-2 on page 12).
The data word address lower four bits are internally incremented following the receipt of each data word. The higher data
word address bits are not incremented, retaining the memory page row location. When the internally generated word
address reaches the page boundary, the subsequent byte loaded will be placed at the beginning of the same page. If
more than sixteen data words are transmitted to the EEPROM, the data word address will roll-over and previously loaded
data will be overwritten.
Acknowledge Polling: Once the internally timed write cycle has started and the EEPROM inputs are disabled,
acknowledge polling can be initiated. This involves sending a Start condition followed by the device address word. The
Read/Write bit is representative of the operation desired. Only if the internal write cycle has completed will the EEPROM
respond with a zero allowing the next read or write sequence to begin.
10.
Read Operations
Read operations are initiated in the same way as Write operations with the exception that the Read/Write select bit in the
device address word is set to one. There are four types of read operations:
Current Address Read
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Random Address Read
Sequential Read
Serial Number Read
Current Address Read: The internal data word address counter maintains the last address accessed during the last
Read or Write operation, incremented by one. This address stays valid between operations as long as the chip power is
maintained. The address roll-over during read is from the last byte of the last memory page to the first byte of the first
page. The address roll-over during write is from the last byte of the current page to the first byte of the same page.
Once the device address with the read/write select bit set to one is clocked in and acknowledged by the EEPROM, the
current address data word is serially clocked out. The microcontroller does not respond with an zero but does generate a
following Stop condition (see Figure 10-3 on page 13).
Random Read: A Random Read requires a dummy byte write sequence to load in the data word address. Once the
device address word and data word address are clocked in and acknowledged by the EEPROM, the microcontroller must
generate another Start condition. The microcontroller now initiates a Current Address Read by sending a device address
with the read/write select bit high. The EEPROM acknowledges the device address and serially clocks out the data word.
The microcontroller does not respond with a zero but does generate a following Stop condition (see Figure 10-4 on page
13).
Sequential Read: Sequential reads are initiated by either a current address read or a random address read. After the
microcontroller receives a data word, it responds with an acknowledge. As long as the EEPROM receives an
acknowledge, it will continue to increment the data word address and serially clock out sequential data words. When the
memory address limit is reached, the data word address will roll-over and the Sequential Read will continue. The
Sequential Read operation is terminated when the microcontroller does not respond with a zero but does generate a
following Stop condition (see Figure 10-5 on page 13).
Atmel AT24CS04/08 [PRELIMINARY DATASHEET]
8766A–SEEPR–6/12
11
Datasheet pdf - http://www.DataSheet4U.co.kr/
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet AT24CS04.PDF ] | |
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