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PDF K7A403600M Data sheet ( Hoja de datos )

Número de pieza K7A403600M
Descripción 128K x 36 Synchronous SRAM
Fabricantes Samsung 
Logotipo Samsung Logotipo



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No Preview Available ! K7A403600M Hoja de datos, Descripción, Manual

K7A403600M
128Kx36 Synchronous SRAM
Document Title
128Kx36-Bit Synchronous Pipelined Burst SRAM
Revision History
Rev. No.
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
1.0
2.0
3.0
History
Draft Date
Remark
Initial draft
May . 15. 1997
Preliminary
Change 7.5 bin to 7.2
January . 13 . 1998 Preliminary
Change speed symbol 6.0/6.7/7.2/8.5 to 60/67/72/85
February. 02. 1998 Preliminary
Change DC characteristics VDD condition from VDD=3.3V+10%/-5% Change
Input/output leackage currant for ±1µA to ±2µA
Modify Read timing & Power down cycle timing.
Change ISB2 value from 30mA to 20mA.
Remove DC characteristics ISB1 - L ver.& ISB2 - L ver .
February. 12. 1998
Preliminary
Remove Low power version.
Add 119BGA(7x17 Ball Grid Array Package)
March. 11 . 1998
Preliminary
Change Undershoot spec
from -3.0V(pulse width20ns) to -2.0V(pulse widthtCYC/2)
Add Overshoot spec 4.6V((pulse widthtCYC/2)
Change VIH max from 5.5V to VDD+0.5V
April. 14. 1998
Preliminary
Change ISB2 value from 20mA to 30mA.
May.13. 1998
Change VDD condition from VDD=3.3V+10%/-5% to VDD=3.3V+0.3V/-0.165V.
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Modify DC characteristics( Input Leakage Current test Conditions)
form VDD=VSS to VDD to Max.
May.14.1998
Preliminary
Preliminary
Final spec Release
May. 15. 1998
Final
Add VDDQ Supply voltage( 2.5V )
Dec. 02. 1998
Final
Remove 119BGA(7x17 Ball Grid Array Package) .
Nov. 26. 1999
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
- 1 - November 1999
Rev 3.0
This datasheet has been downloaded from http://www.digchip.com at this page

1 page




K7A403600M pdf
K7A403600M
128Kx36 Synchronous SRAM
TRUTH TABLES
SYNCHRONOUS TRUTH TABLE
CS1 CS2 CS2 ADSP ADSC ADV WRITE CLK ADDRESS ACCESSED
HXXXL X X
N/A
L LXLXX X
N/A
LXHLXX X
N/A
L LXXLX X
N/A
L XHXL X X
N/A
LHL LXX X
External Address
LHLHLX L
External Address
LHLHLX H
External Address
XXXHHL H
Next Address
HXXXHL H
Next Address
XXXHHL L
Next Address
HXXXHL L
Next Address
XXXHHH H
Current Address
HXXXHH H
Current Address
XXXHHH L
Current Address
HXXXHH L
Current Address
Notes : 1. X means "Dont Care". 2. The rising edge of clock is symbolized by .
3. WRITE = L means Write operation in WRITE TRUTH TABLE.
WRITE = H means Read operation in WRITE TRUTH TABLE.
4. Operation finally depends on status of asynchronous input pins(ZZ and OE).
OPERATION
Not Selected
Not Selected
Not Selected
Not Selected
Not Selected
Begin Burst Read Cycle
Begin Burst Write Cycle
Begin Burst Read Cycle
Continue Burst Read Cycle
Continue Burst Read Cycle
Continue Burst Write Cycle
Continue Burst Write Cycle
Suspend Burst Read Cycle
Suspend Burst Read Cycle
Suspend Burst Write Cycle
Suspend Burst Write Cycle
WRITE TRUTH TABLE
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GW
BW
WEa
WEb
WEc
WEd
HHXXXX
H LHHHH
H L L HHH
H LH LHH
HLHHL L
HL L L L L
L XXXXX
Notes : 1. X means "Dont Care".
2. All inputs in this table must meet setup and hold time around the rising edge of CLK().
OPERATION
READ
READ
WRITE BYTE a
WRITE BYTE b
WRITE BYTE c and d
WRITE ALL BYTEs
WRITE ALL BYTEs
ASYNCHRONOUS TRUTH TABLE
(See Notes 1 and 2):
OPERATION
ZZ OE I/O STATUS
Sleep Mode
HX
High-Z
Read
LL
LH
DQ
High-Z
Write
L X Din, High-Z
Deselected
LX
High-Z
Notes
1. X means "Dont Care".
2. ZZ pin is pulled down internally
3. For write cycles that following read cycles, the output buffers must be
disabled with OE, otherwise data bus contention will occur.
4. Sleep Mode means power down state of which stand-by current does
not depend on cycle time.
5. Deselected means power down state of which stand-by current
depends on cycle time.
- 5 - November 1999
Rev 3.0

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K7A403600M arduino
K7A403600M
128Kx36 Synchronous SRAM
http://www.DataSheet4U.com/
- 11 -
November 1999
Rev 3.0

11 Page







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