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TC58NVG6T2FTA00 fiches techniques PDF

Toshiba - 64 GBIT (8G X 8 BIT) CMOS NAND E2PROM

Numéro de référence TC58NVG6T2FTA00
Description 64 GBIT (8G X 8 BIT) CMOS NAND E2PROM
Fabricant Toshiba 
Logo Toshiba 





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TC58NVG6T2FTA00 fiche technique
TOSHIBA CONFIDENTIAL TC58NVG6T2FTA00
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
64 GBIT (8G 8 BIT) CMOS NAND E2PROM (Triple-Level-Cell)
DESCRIPTION
The TC58NVG6T2FTA00 is a single 3.3 V 64 Gbit (79,054,700,544 bits) NAND Electrically Erasable and
Programmable Read-Only Memory (NAND E2PROM) organized as (8192 1024) bytes 258 pages 4156 blocks.
The device has four 9216-byte static registers which allow program and read data to be transferred between the
register and the memory cell array in 9216-byte increments. The Erase operation is implemented in a single block
unit (2064 Kbytes 258 Kbytes:9216 bytes x 258 pages).
The TC58NVG6T2FTA00 is a serial-type memory device which utilizes the I/O pins for both address and data
input/output as well as for command inputs. The Erase and Program operations are automatically executed making
the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still
cameras and other systems which require high-density non-volatile memory data storage.
FEATURES
Organization
Memory cell array
Register
Page size
Block size
TC58NVG6T2FTA00
9216 1047.1171875K 8
9216 8
9216 bytes
(2064K 258K) bytes
Modes
Read, Reset, Auto Page Program, Auto Block Erase, Status Read,
Multi Page Program, Multi Block Erase, Multi Page Read
Mode control
Serial input/output
Command control
Number of valid blocks
Min 4000 blocks
Max 4156 blocks
Power supply
VCC 2.7 V to 3.6 V
Access time
Cell array to register 110 s max
Serial Read Cycle
25 ns min
Program/Erase time
Auto Page Program
Auto Block Erase
2000 s/page typ.
3 ms/block typ.
Operating current
Read (25 ns cycle)
Program (avg.)
Erase (avg.)
Standby
50 mA max.
50mA max.
50 mA max.
100 A max
Package
TSOP I 48-P-1220-0.50C (Weight: 0.53 g typ.)
FOR RELIABILITY GUIDANCE, PLEASE REFER TO THE APPLICATION NOTES AND COMMENTS (15).
60 bit ECC for each 1K bytes is required.
1 2010-12-27C
Free Datasheet http://www.datasheet.in/

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