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NB3N51034 fiches techniques PDF

ON Semiconductor - 3.3V Crystal to 100MHz - 200MHz Quad HCSL - LVDS Clock Generator

Numéro de référence NB3N51034
Description 3.3V Crystal to 100MHz - 200MHz Quad HCSL - LVDS Clock Generator
Fabricant ON Semiconductor 
Logo ON Semiconductor 





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NB3N51034 fiche technique
NB3N51034
3.3V, Crystal to 100MHz/
200MHz Quad HCSL/LVDS
Clock Generator
The NB3N51034 is a high precision, low phase noise clock generator
that supports spread spectrum designed for PCI Express applications.
This device takes a 25 MHz fundamental mode parallel resonant crystal
and generates 4 dif ferential HCSL/L VDS outputs at 100 MHz or
http://onsemi.com
200 MHz (See Figure 6 for LVDS interface). The NB3N51034 provides
selectable spread options of 0.5%, 1.0%, 1.5%, for applications
demanding low Electromagnetic Interference (EMI). No spread setting
MARKING
DIAGRAM
is also available.
Features
Uses 25 MHz Fundamental Mode Parallel Resonant Crystal
Power Down Mode
4 Low Skew HCSL or LVDS Outputs
TSSOP20
DT SUFFIX
CASE 948E
NB3N
1034
ALYWG
G
OE TriStates Outputs
Spread of 0.5%, 1.0%, 1.5% and No Spread
PCIe Gen 1, 2, 3 Jitter Compliant
Phase Noise (SS OFF) @ 100 MHz:
Offset Noise Power
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = PbFree Package
(Note: Microdot may be in either location)
100 Hz
1 kHz
10 kHz
100 kHz
110 dBc/Hz
123 dBc/Hz
134 dBc/Hz
137 dBc/Hz
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 8 of this data sheet.
1 MHz 138 dBc/Hz
10 MHz 154 dBc/Hz
Operating Range 3.3 V ±5%
Computing and Peripherals
Industrial Temperature Range 40°C to +85°C
Industrial Equipment
Functionally Compatible with IDT55705,
PCIe Clock Generation Gen I, Gen II and Gen III
IDT5V41066, IDT5V41236
These are PbFree Devices
End Products
Switch and Router
Applications
Networking
Consumer
Set Top Box, LCD TV
Servers, Desktop Computers
Automated Test Equipment
VDD
S0 S1 S2
PD OE
X1/CLK
25 MHz Clock
or Crystal X2
Clock Buffer
Crystal Oscillator
Spread Spectrum
Circuit
Phase
Detector
BN
Charge
Pump
VCO
HCSL
Output
HCSL
Output
HCSL
Output
HCSL
Output
CLK0
CLK0
CLK1
CLK1
CLK2
CLK2
CLK3
CLK3
GND Figure 1. NB3N51034 Simplified Logic Diagram
IREF
© Semiconductor Components Industries, LLC, 2013
October, 2013 Rev. 1
1
Publication Order Number:
NB3N51034/D
http://www.Datasheet4U.com

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