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PDF FDD5N50 Data sheet ( Hoja de datos )

Número de pieza FDD5N50
Descripción N-Channel UniFET MOSFET
Fabricantes Fairchild Semiconductor 
Logotipo Fairchild Semiconductor Logotipo



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FDD5N50
N-Channel UniFETTM MOSFET
500 V, 4 A, 1.4 Ω
Features
•R DS(on) = 1.15 Ω (Typ.) @ VGS = 10 V, ID = 2 A
• Low Gate Charge (Typ. 11 nC)
•L ow Crss (Typ. 5 pF)
• 100% Avalanche Tested
•R oHS Compliant
Applications
• LCD/LED/PDP TV
• Lighting
• Uninterruptible Power Supply
November 2013
Description
UniFETTM MOSFET is F airchild Semiconductor ’s high volt age
MOSFET family based on planar stripe and D MOS technology.
This MOSFET is tailored to reduce on-st ate resistance, and to
provide be tter switching performance and higher avalanche
energy strengt h. This device family is suit able for switching
power convert er applicatio ns such as power factor corr ection
(PFC), flat p anel display (FPD) T V pow er, ATX and electronic
lamp ballasts.
D
G
S
D
D-PAK
G
S
MOSFET Maximum Ratings TC = 25oC unless otherwise noted.
Symbol
VDSS
VGSS
ID
IDM
EAS
IAR
EAR
dv/dt
PD
TJ, TSTG
TL
Parameter
Drain to Source Voltage
Gate to Source Voltage
Drain Current
Drain Current
- Continuous (TC = 25oC)
- Continuous (TC = 100oC)
- Pulsed
(Note 1)
Single Pulsed Avalanche Energy
(Note 2)
Avalanche Current
(Note 1)
Repetitive Avalanche Energy
(Note 1)
Peak Diode Recovery dv/dt
Power Dissipation
(TC = 25oC)
- Derate Above 25oC0
(Note 3)
Operating and Storage Temperature Range
Maximum Lead Temperature for Soldering, 1/8” from Case for 5 Seconds
FDD5N50TM_WS
500
±30
4
2.4
16
256
4
4
4.5
40
.3
-55 to +150
300
Unit
V
V
A
A
mJ
A
mJ
V/ns
W
W/oC
oC
oC
Thermal Characteristics
Symbol
RθJC
RθJA
Parameter
Thermal Resistance, Junction to Case, Max.
Thermal Resistance, Junction to Ambient, Max.
FDD5N50TM_WS
1.4
110
Unit
oC/W
©2008 Fairchild Semiconductor Corporation
FDD5N50 Rev. C1
1
www.fairchildsemi.com
http://www.Datasheet4U.com

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FDD5N50 pdf
IG = const.
Figure 12. Gate Charge Test Circuit & Waveform
V10GVS
VDS
VGS
RG
RL
VDD
VDS
90%
DUT
VGS 10%
td(on)
tr
t on
Figure 13. Resistive Switching Test Circuit & Waveforms
td(off)
tf
t off
VGS
Figure 14. Unclamped Inductive Switching Test Circuit & Waveforms
©2008 Fairchild Semiconductor Corporation
FDD5N50 Rev. C1
5
www.fairchildsemi.com

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