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PDF AT42QT5480 Data sheet ( Hoja de datos )
| Número de pieza | AT42QT5480 | |
| Descripción | 10-bit Touchscreen Controller | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Configurations:
– Can be configured as a combination of touchscreen, sliders/wheels and keys, with
Adjacent Key Suppression™ (AKS™) technology between groups
• QField™ Touchscreen:
– Two-touch capable with independent XY tracking for one or two concurrent
touches in real time, with touch size reporting
– Up to eight-inch diagonal screen size supported
– 1024 x 1024 resolution
• Discrete Keys:
– Up to 48 (subject to other configurations)
• QSlide™/QWheel™:
– Configurable up to six independent sliders/wheels
• Linearity:
– Screen design dependent but typically better than ±1 percent
• Filtering:
– Advanced digital filtering (user configurable)
• Response Times:
– Sub 15 ms possible, depending on filter settings
• General Purpose Outputs (GPOs):
– Up to four user controllable outputs
• Technology:
– Patented charge-transfer (transverse mode)
• Panel Thickness:
– Glass up to 5 mm, screen size dependent
– Plastic up to 3 mm, screen size dependent
• Channel Sensitivity:
– Individually settable via simple commands over serial interface
• Interface:
– I2C-compatible slave mode, 100 kHz or 400 kHz with 2.7V or greater Vdd
• Power:
– 1.8V to 5.5V (2.7V to 5.5V in high speed mode)
• Packages:
– 44-pin 7 x 7 mm MLF RoHS compliant
– 44-pin 10 x 10 mm TQFP RoHS compliant
– 49-ball 5 x 5 mm BGA RoHS compliant
• Signal Processing:
– Self-calibration, auto drift compensation, noise filtering, Adjacent Key
Suppression technology
QTwo™ 10-bit
Touchscreen
Controller
AT42QT5480
Summary
Note: This is a summary document. A
complete document is available under
NDA. For more information contact
www.atmel.com/touchscreen.
9510AS–AT42–10/08
1 page  
1.3 Schematic
Figure 1-1. Typical Circuit
Follow regulator manufacturer's recommended values
for input and output bypass capacitors (Creg).
Vunreg
VREG
VDD
Rp
QT5480
XT1
16MHz
VDD
Rp Rp
QT5480
Add two 100nF capacitors: one close to pins 5, 17 and 38,
and another close to pins 27 and 29.
Rx7
Rx6
Rx3
Rx2
Cs0
Rx5
Rx4
Rx1
Rx0
Ry0
Ry1
Cs1
Ry2
Cs2
Ry3
Cs3
Ry4
Cs4
Ry5
Cs5
NOTES:
1) The central pad on the underside of the MLF chip
is a Vss pin and should be connected to ground.
Do not put any other tracks underneath
the body of the chip.
2) It is important to place all Cs, Rs, Rx and Ry
components physically near to the chip.
Rs5 Rs4 Rs3 Rs2 Rs1 Rs0 3) Leave YnA, YnB unconnected if not used
9510AS–AT42–10/08
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet AT42QT5480.PDF ] | |
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