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PDF WT61P8 Data sheet ( Hoja de datos )

Número de pieza WT61P8
Descripción Flat Panel Display Control Sub-MCU
Fabricantes Weltrend 
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WT61P8 v1.01
Flat Panel Display Control Sub-MCU
WT61P8
Flat Panel Display Control Sub-MCU
Data Sheet
Rev. 1.01
April 17, 2008
Copyright Notice
This data sheet is copyrighted by Weltrend Semiconductor, Inc. Do not reproduce, transform to any other format, or
send/transmit any part of this documentation without the express written permission of Weltrend Semiconductor, Inc.
Disclaimers
Right to make change
This document provides technical information for user. Weltrend Semiconductor, Inc. reserves the right to make
change without further notice to any products herein.
Copyright© 2008 Weltrend Semiconductor, Inc. All Rights Reserved.
Weltrend reserves right to modify all information contained in this document without notice.
Page 1

1 page




WT61P8 pdf
2. Pin Assignment
2.1. Package
WT61P8 v1.01
Flat Panel Display Control Sub-MCU
VDD33V
GND
OSCO
OSCI
GPIOB6/SSDA
GPIOB5/SSCL
GPIOB4/P05
GPIOB3/P04
GPIOB2/IR
GPIOB1/IRQ3/CEC
GPIOB0/IRQ2
1
2
3
4
5
6
7
8
9
10
11
61P8-RG440WT
(LQFP)
33 GPIOD2/P10/AD4
32 GPIOD3/P11/AD5
31 GPIOD4/P12/AD6
30 GPIOD5/P13/AD7
29 GPIOD6/TXD1
28 GPIOD7/RXD1
27 GPIOA0/PWM4/P00
26 GPIOA1/PWM5/P01
25 GPIOA2/PWM6/P02
24 GPIOA3/PWM7/P03
23 GPIOA4/DSCL2
NC1
VDD33V
GND
OSCO
OSCI
GPIOB6/SSDA
GPIOB5/SSCL
GPIOB4/P05
GPIOB3/P04
GPIOB2/IR
GPIOB1/IRQ3/CEC
GPIOB0/IRQ2
1
2
3
4
5
6
7
8
9
10
11
12
61P8-RG480WT
(LQFP)
36 GPIOD2/P10/AD4
35 GPIOD3/P11/AD5
34 GPIOD4/P12/AD6
33 GPIOD5/P13/AD7
32 GPIOD6/TXD1
31 GPIOD7/RXD1
30 GPIOA0/PWM4/P00
29 GPIOA1/PWM5/P01
28 GPIOA2/PWM6/P02
27 GPIOA3/PWM7/P03
26 GPIOA4/DSCL2
25 GPIOA5/DSDA2
2.2. Ordering information
Package Type
44-pin LQFP(10x10mm)
48-pin LQFP(7x7mm)
Part Number
61P8-RG440WT
61P8-RG480WT
Copyright© 2008 Weltrend Semiconductor, Inc. All Rights Reserved.
Weltrend reserves right to modify all information contained in this document without notice.
Page 5

5 Page





WT61P8 arduino
WT61P8 v1.01
Flat Panel Display Control Sub-MCU
Baud Rate Generation for UART0
SBRG0EN(SBRG0.7) SMOD1(PCON.7) SMOD2(PCON.6)
0 00
0 SMOD1 or SMOD2 = 1
0 11
1 00
1 SMOD1 or SMOD2 = 1
1 11
TCS1(CKSEL.2)
0
1
0
1
0
1
X
X
X
Baud Rate for UART0
1
32
×
12
×
f osc
(256
TH
1)
1
32
×
3
×
f osc
(256
TH
1)
1
16
×
12
×
f osc
(256
TH
1)
1
16
×
3
×
f osc
(256
TH
1)
1
8
×
12
×
f osc
(256
TH
1)
1
8
×
3
×
f osc
(256
TH1)
1 × f osc
32 (SBRG0[6 : 0] + 1)
1 × f osc
16 (SBRG0[6 : 0] + 1)
1 × f osc
8 (SBRG0[6 : 0] + 1)
Baud Rate Generation for UART1
SBRG1EN(SBRG1.7) SMOD2(PCON.6)
00
TCS2(CKSEL.3)
0
1
0 10
1
1 0X
1 1X
Baud Rate for UART1
1
16
×
12
×
f osc
(65536
RCAP2)
1
16
×
3
×
f osc
(65536
RCAP
2)
1
8
×
12
×
f osc
(65536
RCAP
2)
1
8
×
3
×
f osc
(65536
RCAP
2)
1 × f osc
16 (SBRG1[6 : 0] + 1)
1 × f osc
8 (SBRG1[6 : 0] + 1)
Copyright© 2008 Weltrend Semiconductor, Inc. All Rights Reserved.
Weltrend reserves right to modify all information contained in this document without notice.
Page 11

11 Page







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