PDF AT25DF081A Data sheet ( Hoja de datos )

Número de pieza	AT25DF081A
Descripción	8-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory
Fabricantes	ATMEL Corporation
Logotipo
Hay una vista previa y un enlace de descarga de AT25DF081A (archivo pdf) en la parte inferior de esta página. Total 53 Páginas
No Preview Available ! Features • Single 2.7V - 3.6V Supply • Serial Peripheral Interface (SPI) Compatible – Supports SPI Modes 0 and 3 – Supports RapidS Operation – Supports Dual-Input Program and Dual-Output Read • Very High Operating Frequencies – 100MHz for RapidS – 85MHz for SPI – Clock-to-Output (tV) of 5ns Maximum • Flexible, Optimized Erase Architecture for Code + Data Storage Applications – Uniform 4-Kbyte Block Erase – Uniform 32-Kbyte Block Erase – Uniform 64-Kbyte Block Erase – Full Chip Erase • Individual Sector Protection with Global Protect/Unprotect Feature – 16 Sectors of 64-Kbytes Each • Hardware Controlled Locking of Protected Sectors via WP Pin • Sector Lockdown – Make Any Combination of 64-Kbyte Sectors Permanently Read-Only • 128-Byte Programmable OTP Security Register • Flexible Programming – Byte/Page Program (1- to 256-Bytes) • Fast Program and Erase Times – 1.0ms Typical Page Program (256 Bytes) Time – 50ms Typical 4-Kbyte Block Erase Time – 250ms Typical 32-Kbyte Block Erase Time – 400ms Typical 64-Kbyte Block Erase Time • Automatic Checking and Reporting of Erase/Program Failures • Software Controlled Reset • JEDEC Standard Manufacturer and Device ID Read Methodology • Low Power Dissipation – 5mA Active Read Current (Typical at 20MHz) – 5µA Deep Power-Down Current (Typical) • Endurance: 100,000 Program/Erase Cycles • Data Retention: 20 Years • Complies with Full Industrial Temperature Range • Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options – 8-lead SOIC (150-mil and 208-mil wide) – 8-pad Ultra Thin DFN (5 x 6 x 0.6mm) 8-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory Atmel AT25DF081A Preliminary 8715B–SFLSH–8/10 1 page Atmel AT25DF081A [Preliminary] 4. Memory Array To provide the greatest flexibility, the memory array of the Atmel® AT25DF081A can be erased in four levels of granularity including a full chip erase. In addition, the array has been divided into physical sectors of uniform size, of which each sector can be individually protected from program and erase operations. The size of the physical sectors is optimized for both code and data storage applications, allowing both code and data segments to reside in their own isolated regions. The Memory Architecture Diagram illustrates the breakdown of each erase level as well as the breakdown of each physical sector. Figure 4-1. Memory Architecture Diagram Block Erase Detail Internal Sectoring for Sector Protection Function 64KB (Sector 15) 64KB (Sector 14) 64KB 32KB 4KB Block Erase Block Erase Block Erase (D8h Command) (52h Command) (20h Command) Block Address Range 64KB 32KB 32KB 64KB 32KB 32KB 4KB 0FFFFFh – 0FF000h 4KB 0FEFFFh – 0FE000h 4KB 0FDFFFh – 0FD000h 4KB 0FCFFFh – 0FC000h 4KB 0FBFFFh – 0FB000h 4KB 0FAFFFh – 0FA000h 4KB 0F9FFFh – 0F9000h 4KB 0F8FFFh – 0F8000h 4KB 0F7FFFh – 0F7000h 4KB 0F6FFFh – 0F6000h 4KB 0F5FFFh – 0F5000h 4KB 0F4FFFh – 0F4000h 4KB 0F3FFFh – 0F3000h 4KB 0F2FFFh – 0F2000h 4KB 0F1FFFh – 0F1000h 4KB 0F0FFFh – 0F0000h 4KB 0EFFFFh – 0EF000h 4KB 0EEFFFh – 0EE000h 4KB 0EDFFFh – 0ED000h 4KB 0ECFFFh – 0EC000h 4KB 0EBFFFh – 0EB000h 4KB 0EAFFFh – 0EA000h 4KB 0E9FFFh – 0E9000h 4KB 0E8FFFh – 0E8000h 4KB 0E7FFFh – 0E7000h 4KB 0E6FFFh – 0E6000h 4KB 0E5FFFh – 0E5000h 4KB 0E4FFFh – 0E4000h 4KB 0E3FFFh – 0E3000h 4KB 0E2FFFh – 0E2000h 4KB 0E1FFFh – 0E1000h 4KB 0E0FFFh – 0E0000h 64KB (Sector 0) 64KB 32KB 32KB 4KB 00FFFFh – 00F000h 4KB 00EFFFh – 00E000h 4KB 00DFFFh – 00D000h 4KB 00CFFFh – 00C000h 4KB 00BFFFh – 00B000h 4KB 00AFFFh – 00A000h 4KB 009FFFh – 009000h 4KB 008FFFh – 008000h 4KB 007FFFh – 007000h 4KB 006FFFh – 006000h 4KB 005FFFh – 005000h 4KB 004FFFh – 004000h 4KB 003FFFh – 003000h 4KB 002FFFh – 002000h 4KB 001FFFh – 001000h 4KB 000FFFh – 000000h Page Program Detail 1-256 Byte Page Program (02h Command) Page Address Range 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 0FFFFFh – 0FFF00h 0FFEFFh – 0FFE00h 0FFDFFh – 0FFD00h 0FFCFFh – 0FFC00h 0FFBFFh – 0FFB00h 0FFAFFh – 0FFA00h 0FF9FFh – 0FF900h 0FF8FFh – 0FF800h 0FF7FFh – 0FF700h 0FF6FFh – 0FF600h 0FF5FFh – 0FF500h 0FF4FFh – 0FF400h 0FF3FFh – 0FF300h 0FF2FFh – 0FF200h 0FF1FFh – 0FF100h 0FF0FFh – 0FF000h 0FEFFFh – 0FEF00h 0FEEFFh – 0FEE00h 0FEDFFh – 0FED00h 0FECFFh – 0FEC00h 0FEBFFh – 0FEB00h 0FEAFFh – 0FEA00h 0FE9FFh – 0FE900h 0FE8FFh – 0FE800h 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 256 Bytes 0017FFh – 001700h 0016FFh – 001600h 0015FFh – 001500h 0014FFh – 001400h 0013FFh – 001300h 0012FFh – 001200h 0011FFh – 001100h 0010FFh – 001000h 000FFFh – 000F00h 000EFFh – 000E00h 000DFFh – 000D00h 000CFFh – 000C00h 000BFFh – 000B00h 000AFFh – 000A00h 0009FFh – 000900h 0008FFh – 000800h 0007FFh – 000700h 0006FFh – 000600h 0005FFh – 000500h 0004FFh – 000400h 0003FFh – 000300h 0002FFh – 000200h 0001FFh – 000100h 0000FFh – 000000h 8715B–SFLSH–8/10 5 5 Page Atmel AT25DF081A [Preliminary] 8. Program and Erase Commands 8.1 Byte/Page Program The Byte/Page Program command allows anywhere from a single byte of data to 256-bytes of data to be pro- grammed into previously erased memory locations. An erased memory location is one that has all eight bits set to the logical “1” state (a byte value of FFh). Before a Byte/Page Program command can be started, the Write Enable command must have been previously issued to the device (see “Write Enable” on page 17) to set the Write Enable Latch (WEL) bit of the Status Register to a logical “1” state. To perform a Byte/Page Program command, an opcode of 02h must be clocked into the device followed by the three address bytes denoting the first byte location of the memory array to begin programming at. After the address bytes have been clocked in, data can then be clocked into the device and will be stored in an internal buffer. If the starting memory address denoted by A23-A0 does not fall on an even 256-byte page boundary (A7-A0 are not all 0), then special circumstances regarding which memory locations to be programmed will apply. In this situa- tion, any data that is sent to the device that goes beyond the end of the page will wrap around back to the beginning of the same page. For example, if the starting address denoted by A23-A0 is 0000FEh, and three bytes of data are sent to the device, then the first two bytes of data will be programmed at addresses 0000FEh and 0000FFh while the last byte of data will be programmed at address 000000h. The remaining bytes in the page (addresses 000001h through 0000FDh) will not be programmed and will remain in the erased state (FFh). In addi- tion, if more than 256-bytes of data are sent to the device, then only the last 256-bytes sent will be latched into the internal buffer. When the CS pin is deasserted, the device will take the data stored in the internal buffer and program it into the appropriate memory array locations based on the starting address specified by A23-A0 and the number of data bytes sent to the device. If less than 256-bytes of data were sent to the device, then the remaining bytes within the page will not be programmed and will remain in the erased state (FFh). The programming of the data bytes is inter- nally self-timed and should take place in a time of tPP or tBP if only programming a single byte. The three address bytes and at least one complete byte of data must be clocked into the device before the CS pin is deasserted, and the CS pin must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the device will abort the operation and no data will be programmed into the memory array. In addition, if the address specified by A23-A0 points to a memory location within a sector that is in the protected state (see “Protect Sector” on page 19) or locked down (see “Sector Lockdown” on page 25), then the Byte/Page Program command will not be executed, and the device will return to the idle state once the CS pin has been deasserted. The WEL bit in the Status Register will be reset back to the logical “0” state if the program cycle aborts due to an incomplete address being sent, an incomplete byte of data being sent, the CS pin being deasserted on uneven byte boundaries, or because the memory location to be programmed is protected or locked down. While the device is programming, the Status Register can be read and will indicate that the device is busy. For faster throughput, it is recommended that the Status Register be polled rather than waiting the tBP or tPP time to determine if the data bytes have finished programming. At some point before the program cycle completes, the WEL bit in the Status Register will be reset back to the logical “0” state. The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to pro- gram properly. If a programming error arises, it will be indicated by the EPE bit in the Status Register. 8715B–SFLSH–8/10 11 11 Page

Páginas	Total 53 Páginas
PDF Descargar	[ Datasheet AT25DF081A.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
AT25DF081	8-megabit 1.65-volt Minimum SPI Serial Flash Memory	ATMEL Corporation
AT25DF081A	8-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory	ATMEL Corporation
AT25DF081A	8-Mbit 2.7V Minimum SPI Serial Flash Memory	Adesto

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar