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AT25DF321A-MH-T fiches techniques PDF

Adesto - 32-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory

Numéro de référence AT25DF321A-MH-T
Description 32-Mbit 2.7V Minimum Serial Peripheral Interface Serial Flash Memory
Fabricant Adesto 
Logo Adesto 





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AT25DF321A-MH-T fiche technique
Features
Single 2.7V - 3.6V Supply
Serial Peripheral Interface (SPI) Compatible
– Supports SPI Modes 0 and 3
– Supports RapidS Operation
– Supports Dual-Input Program and Dual-Output Read
Very High Operating Frequencies
– 100MHz for RapidS
– 85MHz for SPI
– Clock-to-Output (tV) of 5ns Maximum
Flexible, Optimized Erase Architecture for Code + Data Storage Applications
– Uniform 4-Kbyte Block Erase
– Uniform 32-Kbyte Block Erase
– Uniform 64-Kbyte Block Erase
– Full Chip Erase
Individual Sector Protection with Global Protect/Unprotect Feature
– 64 Sectors of 64-Kbytes Each
Hardware Controlled Locking of Protected Sectors via WP Pin
Sector Lockdown
– Make Any Combination of 64-Kbyte Sectors Permanently Read-Only
128-Byte Programmable OTP Security Register
Flexible Programming
– Byte/Page Program (1- to 256-Bytes)
Fast Program and Erase Times
– 1.0ms Typical Page Program (256-Bytes) Time
– 50ms Typical 4-Kbyte Block Erase Time
– 250ms Typical 32-Kbyte Block Erase Time
– 400ms Typical 64-Kbyte Block Erase Time
Program and Erase Suspend/Resume
Automatic Checking and Reporting of Erase/Program Failures
Software Controlled Reset
JEDEC Standard Manufacturer and Device ID Read Methodology
Low Power Dissipation
– 12mA Active Read Current (Typical at 20MHz)
– 5µA Deep Power-Down Current (Typical)
Endurance: 100,000 Program/Erase Cycles
Data Retention: 20 Years
Complies with Full Industrial Temperature Range
Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options
– 8-lead SOIC (208-mil wide)
– 8-pad Ultra Thin DFN (5 x 6 x 0.6mm)
– 9-ball UBGA (6 x 6 x 0.6 mm body - 1 mm pitch)
32-Mbit
2.7V Minimum
Serial Peripheral
Interface Serial
Flash Memory
AT25DF321A
3686F–DFLASH–1/2014

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