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PDF LQ104V1DW02 Data sheet ( Hoja de datos )
| Número de pieza | LQ104V1DW02 | |
| Descripción | TFT LCD Module | |
| Fabricantes | Sharp | |
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Product Specifications
Mobile Liquid Crystal Displays Group
LQ104V1DW02
TFT-LCD Module
Spec. Issue Date: Aug. 26, 2005
No: LD-17817A
1 page  
3. Mechanical Specifications
Parameter
Display size
Active area
Pixel format
Pixel pitch
Pixel configuration
Display mode
Unit outline dimensions *1
Mass
Surface treatment
Specifications
26 (10.4") Diagonal
211.2(H) 158.4(V)
640(H) 480(V)
(1 pixel R G B dots)
0.330(H) 0.330(V)
R,G,B vertical stripe
Normally black
246.5(W) 179.4(H) 15.5max(D)
620(max)
Anti-glare and hard-coating 3H
*1: excluding backlight cables.
Outline dimensions is shown in Fig.1
Assembling form is shown in Fig.4
Unit
cm
mm
pixel
mm
mm
g
5 Page 
7. Timing Characteristics of input signals
Timing diagrams of input signal are shown in Fig.2-
.
7-1. Timing characteristics
Parameter
Symbol Mode Min. Typ. Max. Unit Remark
Clock
Frequency 1/Tc all
25.18 28.33 MHz
High time Tch
5
ns
Low time Tcl
10
ns
Data Setup time Tds
5
ns
Hold time Tdh
10
ns
Horizontal Cycle
TH
30.00 31.78
s
sync. signal
750 800 900 clock
Pulse width THp
2 96 200 clock
Vertical
Cycle
TV 480 515 525 560 line
sync. signal
400 446 449 480 line
350 447 449 510 line
Pulsewidth TVp all
1
34 line
Horizontal display period THd
640 640 640 clock
Hsync-Clock
THc 10
Tc-10 ns
phase difference
Hsync-Vsync
TVh 0 TH-THp clock
phase difference
Note) In case of lower frequency, the deterioration of display quality, flicker etc.,may be occurred.
7-2. Horizontal display position
The horizontal display position is determined by ENAB signal and the input data corresponding
to the rising edge of ENAB signal is displayed at the left end of the active area.
Parameter
symbol Min. Typ. Max. Unit Remark
Enable signal Setup time Tes
5
Tc-10 ns
Pulse width Tep
2
640 640 clock
Hsync-Enable signal
THe 44
TH-664 clock
phase difference
Note) When ENAB is fixed "Low", the display starts from the data of C104(clock) as shown
in Fig.2-
. Be careful that the module does not work when ENAB is fixed "High".
When the phase difference is below 104 clock, keep the “High level of ENAB is signal longer
Than 104-The. If it will not be keeped, the display starts from the data of C104(clock).
11 Page | ||
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