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PDF MX29SL402CB Data sheet ( Hoja de datos )
| Número de pieza | MX29SL402CB | |
| Descripción | FLASH MEMORY | |
| Fabricantes | Macronix International | |
| Logotipo |  |
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FEATURES
MX29SL402C T/B
4M-BIT [512K x 8 / 256K x 16] SINGLE VOLTAGE
1.8V ONLY FLASH MEMORY
GENERAL FEATURES
• Single Power Supply Operation
- 1.65 to 2.2 volt for read, erase, and program operations
• 524,288 x 8 / 262,144 x 16 switchable
• Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Sector Structure
- 16K-Byte x 1, 8K-Byte x 2, 32K-Byte x 1, and 64K-Byte x 7
• Sector protection
- Hardware method to disable any combination of sectors from program or erase operations
- Temporary sector unprotected allows code changes in previously locked sectors
• Latch-up protected to 100mA from -1V to Vcc + 1V
• Compatible with JEDEC standard
- Pinout and software compatible to single power supply Flash
PERFORMANCE
• High Performance
- Access time: 90ns
- Byte/Word program time: 12us/18us (typical)
- Erase time: 1.3s/sector, 9s/chip (typical)
• Low Power Consumption
- Low active read current: 6mA (maximum) at 5MHz
- Low standby current: 1uA (typical)
• Typical 100,000 erase/program cycle
• 10 years data retention
SOFTWARE FEATURES
• Erase Suspend/ Erase Resume
- Suspends sector erase operation to read data from or program data to another sector which is not being erased
• Status Reply
- Data# Polling & Toggle bits provide detection of program and erase operation completion
• Support Common Flash Interface (CFI)
HARDWARE FEATURES
• Ready/Busy# (RY/BY#) Output
- Provides a hardware method of detecting program and erase operation completion
• Hardware Reset (RESET#) Input
- Provides a hardware method to reset the internal state machine to read mode
PACKAGE
• 48-Pin TSOP
• 48-Ball FBGA (6x8x1.2mm, 6x8x1.3mm,4x6x0.75mm)
• 48-Ball XFLGA (4x6x0.5mm)
• All Pb-free devices are RoHS Compliant
P/N:PM1362
REV. 1.0, JUN. 13, 2008
1
1 page  
BLOCK DIAGRAM
MX29SL402C T/B
CE#
OE#
WE#
RESET#
BYTE#
CONTROL
INPUT
LOGIC
PROGRAM/ERASE
HIGH VOLTAGE
WRITE
STATE
MACHINE
(WSM)
A0-AM
ADDRESS
LATCH
AND
BUFFER
Q0-Q15/A-1
FLASH
ARRAY
Y-PASS GATE
ARRAY
SOURCE
HV
SENSE
AMPLIFIER
PGM
DATA
HV
PROGRAM
DATA LATCH
STATE
REGISTER
COMMAND
DATA
DECODER
COMMAND
DATA LATCH
I/O BUFFER
AM: MSB address
P/N:PM1362
REV. 1.0, JUN. 13, 2008
5
5 Page 
MX29SL402C T/B
TABLE 3. MX29SL402CT/B COMMAND DEFINITIONS
Com m and
1st Bus Cyc
2nd Bus Cyc
3rd B us Cy c
4th Bus Cyc
5th Bus Cyc
6th Bus Cyc
Read
M ode
Hex
Addr Addr
Data Data
A ddr
Data
Addr
Data
Reset
M ode
XXX
F0
A ddr
Data
A ddr
Data
A ddr
Data
Automatic Select
S ilic on ID
Dev ic e ID
S ec tor P rotec t
V erify
P rogram
W o rd
555
Byte
AAA
Word B yte
555 AAA
W o rd
555
Byte
AAA
Word B yte
555 AAA
AA
AA AA AA
AA
AA AA AA
2A A
55
555
555
55
AAA
2AA
55
555
555
55
AAA
2AA
55
555
555
55
AAA
2AA
55
555
555
55
AAA
90
90 90 90
90
90 A0 A0
X 00
C2H
X00
C2H
(S ec tor) (S ec tor)
X01 X02 X02
X04 Addr Addr
ID ID 00/01 00/01 Data Data
Command
1st Bus Cyc
2nd Bus Cyc
3rd Bus Cyc
4th Bus Cyc
5th Bus Cyc
6th Bus Cyc
Hex
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Chip Erase
Word Byte
555 AAA
AA AA
2AA 555
55 55
555 AAA
80 80
555 AAA
AA AA
2AA 555
55 55
555 AAA
10 10
Sector Erase
Word Byte
555 AAA
AA AA
2AA 555
55 55
555 AAA
80 80
555 AAA
AA AA
2AA 555
55 55
Sector Sector
30 30
E ras e
CFI Read Suspend
Word Byte W ord/Byte
55 AA
XXX
98 98
B0
E ras e
Resume
W ord/Byte
XXX
30
Notes:
1. Device ID: 2270H/70H for Top Boot Sector device.
22F1H/F1H for Bottom Boot Sector device.
2. For sector protect verify result, XX00H/00H means sector is not protected, XX01H/01H means sector has been
protected.
3. Sector Protect command is valid during Vhv at RESET# pin, Vih at A1 pin and Vil at A0, A6 pins. The last Bus cyc
is for protect verify.
P/N:PM1362
REV. 1.0, JUN. 13, 2008
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MX29SL402CB.PDF ] | |
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