DataSheet.es    


PDF MT29F32G08ABCAB Data sheet ( Hoja de datos )

Número de pieza MT29F32G08ABCAB
Descripción NAND Flash Memory
Fabricantes Micron　
Logotipo Micron Logotipo



Hay una vista previa y un enlace de descarga de MT29F32G08ABCAB (archivo pdf) en la parte inferior de esta página.


Total 30 Páginas

No Preview Available ! MT29F32G08ABCAB Hoja de datos, Descripción, Manual

Micron Confidential and Proprietary
32Gb, 64Gb, 128Gb, 256Gb Asynchronous/Synchronous NAND
Features
NAND Flash Memory
MT29F32G08ABAAA, MT29F64G08AFAAA, MT29F128G08A[J/K/M]AAA
MT29F256G08AUAAA, MT29F32G08ABCAB, MT29F64G08AECAB
MT29F128G08A[K/M]CAB, MT29F256G08AUCAB
Features
• Open NAND Flash Interface (ONFI) 2.2-compliant1
• Single-level cell (SLC) technology
• Organization
– Page size x8: 8640 bytes (8192 + 448 bytes)
– Block size: 128 pages (1024K + 56K bytes)
– Plane size: 2 planes x 2048 blocks per plane
– Device size: 32Gb: 4096 blocks;
64Gb: 8192 blocks;
128Gb: 16,384 blocks;
256Gb: 32,786 blocks
• Synchronous I/O performance
– Up to synchronous timing mode 5
– Clock rate: 10ns (DDR)
– Read/write throughput per pin: 200 MT/s
• Asynchronous I/O performance
– Up to asynchronous timing mode 5
– tRC/tWC: 20ns (MIN)
– Read/write throughput per pin: 50 MT/s
• Array performance
– Read page: 35µs (MAX)
– Program page: 350µs (TYP)
– Erase block: 1.5ms (TYP)
• Operating Voltage Range
– VCC: 2.7–3.6V
– VCCQ: 1.7–1.95V, 2.7–3.6V
• Command set: ONFI NAND Flash Protocol
• Advanced Command Set
– Program cache
– Read cache sequential
– Read cache random
– One-time programmable (OTP) mode
– Multi-plane commands
– Multi-LUN operations
– Read unique ID
– Copyback
• First block (block address 00h) is valid when ship-
ped from factory. For minimum required ECC, see
Error Management (page 114).
• RESET (FFh) required as first command after pow-
er-on
• Operation status byte provides software method for
detecting
– Operation completion
– Pass/fail condition
– Write-protect status
• Data strobe (DQS) signals provide a hardware meth-
od for synchronizing data DQ in the synchronous
interface
• Copyback operations supported within the plane
from which data is read
• Quality and reliability
– Data retention: JESD47G compliant; see qualifi-
cation report
– Endurance: 60,000 PROGRAM/ERASE cycles
• Operating temperature:
– Commercial: 0°C to +70°C
– Industrial (IT): –40ºC to +85ºC
• Package
– 52-pad LGA
– 48-pin TSOP
– 100-ball BGA
– 132-ball BGA
Note: 1. The ONFI 2.2 specification is available at
www.onfi.org.
PDF: 09005aef83e0bed4
M73A_32Gb_64Gb_128Gb_256Gb_AsyncSync_NAND.pdf Rev. F 5/12 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2010 Micron Technology, Inc. All rights reserved.
Products and specifications discussed herein are subject to change by Micron without notice.

1 page




MT29F32G08ABCAB pdf
Micron Confidential and Proprietary
32Gb, 64Gb, 128Gb, 256Gb Asynchronous/Synchronous NAND
Features
List of Tables
Table 1: Asynchronous and Synchronous Signal Definitions .............................................................................. 9
Table 2: Array Addressing for Logical Unit (LUN) ............................................................................................ 31
Table 3: Asynchronous Interface Mode Selection ............................................................................................ 32
Table 4: Synchronous Interface Mode Selection .............................................................................................. 42
Table 5: Command Set .................................................................................................................................. 54
Table 6: Read ID Parameters for Address 00h .................................................................................................. 60
Table 7: Read ID Parameters for Address 20h .................................................................................................. 60
Table 8: Parameter Page Data Structure .......................................................................................................... 62
Table 9: Feature Address Definitions .............................................................................................................. 73
Table 10: Feature Address 01h: Timing Mode .................................................................................................. 75
Table 11: Feature Addresses 10h and 80h: Programmable Output Drive Strength .............................................. 76
Table 12: Feature Addresses 81h: Programmable R/B# Pull-Down Strength ...................................................... 76
Table 13: Feature Addresses 90h: Array Operation Mode ................................................................................. 77
Table 14: Status Register Definition ................................................................................................................ 78
Table 15: OTP Area Details ............................................................................................................................ 109
Table 16: Error Management Details ............................................................................................................. 114
Table 17: Output Drive Strength Conditions (VCCQ = 1.7–1.95V) ...................................................................... 115
Table 18: Output Drive Strength Impedance Values (VCCQ = 1.7–1.95V) ........................................................... 115
Table 19: Output Drive Strength Conditions (VCCQ = 2.7–3.6V) ....................................................................... 116
Table 20: Output Drive Strength Impedance Values (VCCQ = 2.7–3.6V) ............................................................ 116
Table 21: Pull-Up and Pull-Down Output Impedance Mismatch ..................................................................... 117
Table 22: Asynchronous Overshoot/Undershoot Parameters .......................................................................... 118
Table 23: Synchronous Overshoot/Undershoot Parameters ............................................................................ 118
Table 24: Test Conditions for Input Slew Rate ................................................................................................ 119
Table 25: Input Slew Rate (VCCQ = 1.7–1.95V) ................................................................................................. 119
Table 26: Test Conditions for Output Slew Rate .............................................................................................. 120
Table 27: Output Slew Rate (VCCQ = 1.7–1.95V) ............................................................................................... 120
Table 28: Output Slew Rate (VCCQ = 2.7–3.6V) ................................................................................................ 120
Table 29: Absolute Maximum Ratings by Device ............................................................................................ 121
Table 30: Recommended Operating Conditions ............................................................................................. 121
Table 31: Valid Blocks per LUN ...................................................................................................................... 121
Table 32: Capacitance: 100-Ball BGA Package ................................................................................................ 122
Table 33: Capacitance: 132-Ball BGA Package ................................................................................................ 123
Table 34: Capacitance: 48-Pin TSOP Package ................................................................................................. 123
Table 35: Capacitance: 52-Pad LGA Package .................................................................................................. 123
Table 36: Test Conditions .............................................................................................................................. 124
Table 37: DC Characteristics and Operating Conditions (Asynchronous Interface) .......................................... 124
Table 38: DC Characteristics and Operating Conditions (Synchronous Interface) ............................................ 125
Table 39: DC Characteristics and Operating Conditions (3.3V VCCQ) ............................................................... 125
Table 40: DC Characteristics and Operating Conditions (1.8V VCCQ) ............................................................... 126
Table 41: AC Characteristics: Asynchronous Command, Address, and Data ..................................................... 126
Table 42: AC Characteristics: Synchronous Command, Address, and Data ...................................................... 128
Table 43: Array Characteristics ...................................................................................................................... 131
PDF: 09005aef83e0bed4
M73A_32Gb_64Gb_128Gb_256Gb_AsyncSync_NAND.pdf Rev. F 5/12 EN
5 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2010 Micron Technology, Inc. All rights reserved.

5 Page





MT29F32G08ABCAB arduino
Micron Confidential and Proprietary
32Gb, 64Gb, 128Gb, 256Gb Asynchronous/Synchronous NAND
Signal Assignments
Signal Assignments
Figure 2: 48-Pin TSOP Type 1 (Top View)
Sync Async
x8 x8
Async
x8
Sync
x8
NC
NC
NC
NC
NC
R/B2#1
R/B#
W/R#
CE#
CE2#1
NC
VCC
VSS
NC
NC
CLE
ALE
CLK
WP#
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
R/B2#1
R/B#
RE#
CE#
CE2#1
NC
VCC
VSS
NC
NC
CLE
ALE
WE#
WP#
NC
NC
NC
NC
NC
1l
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
DNU/VSSQ2 DNU/VSSQ2
NC NC
46 NC
NC
45 NC
NC
44 DQ7 DQ7
43 DQ6 DQ6
42 DQ5 DQ5
41 DQ4 DQ4
40 NC
NC
39 DNU/VCCQ2 DNU/VCCQ2
38 DNU DNU
37 VCC
VCC
36 VSS
VSS
35 DNU DQS
34
33
DNU/VCCQ2 DNU/VCCQ2
NC NC
32 DQ3 DQ3
31 DQ2 DQ2
30 DQ1 DQ1
29 DQ0 DQ0
28 NC
NC
27 NC
NC
26 DNU DNU
25 DNU/VSSQ2 DNU/VSSQ2
Notes:
1. CE2# and R/B2# are available on dual die and quad die packages. They are NC for other
configurations.
2. These VCCQ and VSSQ pins are for compatibility with ONFI 2.2. If not supplying VCCQ or
VSSQ to these pins, do not use them.
3. TSOP devices do not support the synchronous interface.
PDF: 09005aef83e0bed4
M73A_32Gb_64Gb_128Gb_256Gb_AsyncSync_NAND.pdf Rev. F 5/12 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2010 Micron Technology, Inc. All rights reserved.

11 Page







PáginasTotal 30 Páginas
PDF Descargar[ Datasheet MT29F32G08ABCAB.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
MT29F32G08ABCABNAND Flash MemoryMicron
Micron

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

 Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

 Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar