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PDF AS7C32096A-12TI Data sheet ( Hoja de datos )
| Número de pieza | AS7C32096A-12TI | |
| Descripción | 3.3V 256K x 8 CMOS SRAM | |
| Fabricantes | Alliance Semiconductor | |
| Logotipo |  |
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February 2006
AS7C32096A
®
3.3V 256K × 8 CMOS SRAM
Features
• Industrial and commercial temperature
• Organization: 262,144 words × 8 bits
• Center power and ground pins
• High speed
- 10/12/15/20 ns address access time
- 4/5/6/7 ns output enable access time
• Low power consumption: ACTIVE
- 650 mW / max @ 10 ns
• Low power consumption: STANDBY
- 28.8 mW / max CMOS
• Equal access and cycle times
• Easy memory expansion with CE, OE inputs
• TTL-compatible, three-state I/O
• JEDEC standard packages
- 44-pin TSOP 2
• ESD protection ≥ 2000 volts
• Latch-up current ≥ 200 mA
Logic block diagram
VCC
GND
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
Input buffer
262,144 × 8
Array
(2,097,152)
Column decoder
Control
Circuit
I/O1
I/O8
WE
OE
CE
Pin arrangements
NC
NC
A0
A1
A2
A3
A4
CE
I/O1
I/O2
VCC
GND
I/O3
I/O4
WE
A5
A6
A7
A8
A9
NC
NC
44-pin TSOP 2
1 44
2 43
3 42
4 41
5 40
6 39
7 38
8 37
9 36
10 35
11 34
12 33
13 32
14 31
15 30
16 29
17 28
18 27
19 26
20 25
21 24
22 23
NC
NC
NC
A17
A16
A15
A14
OE
I/O8
I/O7
GND
VCC
I/O6
I/O5
A13
A12
A11
A10
NC
NC
NC
NC
Selection guide
Maximum address access time
Maximum output enable access time
Maximum operating current
Maximum CMOS standby current
Industrial
Commercial
–10
10
4
180
170
8
–12
12
5
160
150
8
–15
15
6
140
130
8
–20 Unit
20 ns
7 ns
110 mA
100 mA
8 mA
2/17/06, v 1.1
Alliance Semiconductor
P. 1 of 9
Copyright © Alliance Semiconductor. All rights reserved.
1 page  
AS7C32096A
®
Write cycle (over the operating range)9
–10
Parameter
Symbol Min Max
Write cycle time
tWC 10
–
Chip enable (CE) to write end
tCW 7
–
Address setup to write end
tAW 7
–
Address setup time
tAS 0
–
Write pulse width (OE = high) tWP1 7
–
Write pulse width (OE = low
tWP2 10
–
Address hold from end of write tAH 0
–
Write recovery time
tWR 0
–
Data valid to write end
tDW 5
–
Data hold time
tDH 0
–
Write enable to output in high Z tWZ 0
5
Output active from write end
tOW 3
–
–12
Min Max
12 –
8–
8–
0–
8–
12 –
0–
0–
6–
0–
06
3–
–15
Min Max
15 –
10 –
10 –
0–
10 –
15 –
0–
0–
7–
0–
07
3–
–20
Min Max Unit Notes
20 – ns
12 – ns
12 – ns
0 – ns
12 – ns
20 – ns
0 – ns
0 – ns
9 – ns
0 – ns 3,4
0 9 ns 3,4
3 – ns 3,4
Write waveform 1 (WE controlled)9
tWC
Address
WE
DIN
DOUT
tAW
tWP
tAS
tWZ
tWR
tAH
tDW
Data valid
tDH
tOW
2/17/06, v 1.1
Alliance Semiconductor
P. 5 of 9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet AS7C32096A-12TI.PDF ] | |
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