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PDF AS7C164A Data sheet ( Hoja de datos )

Número de pieza AS7C164A
Descripción 8K x 8 BIT HIGH SPEED CMOS SRAM
Fabricantes Alliance Semiconductor 
Logotipo Alliance Semiconductor Logotipo



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No Preview Available ! AS7C164A Hoja de datos, Descripción, Manual

NOVEMBER 2009
AS7C164A
8K X 8 BIT HIGH SPEED CMOS SRAM
FEATURES
Fast access time : 12/15 ns
Low power consumption:
Operating current : 110/100/90/80mA (TYP.)
Standby current : 1mA (TYP.)
Single 5V power supply
All inputs and outputs TTL compatible
Fully static operation
Tri-state output
Data retention voltage : 2.0V (MIN.)
Green package available
Package : 28-pin 300 mil SOJ
PRODUCT FAMILY
Product
Family
AS7C164A
Operating
Temperature
0 ~ 70
Vcc Range
4.5 ~ 5.5V
GENERAL DESCRIPTION
The AS7C164A is a 65,536-bit high speed CMOS static
random access memory organized as 8,192 words
by 8 bits. It is fabricated using very high
performance, high reliability CMOS technology. Its
standby current is stable within the range of
operating temperature.
The AS7C164A is well designed for high speed system
applications, and particularly well suited for battery
back-up nonvolatile memory application.
The AS7C164A operates from a single power supply
of 5V and all inputs and outputs are fully TTL
compatible
Speed
12/15ns
Power Dissipation
Standby(ISB1,TYP.) Operating(Icc,TYP.)
1mA
110/100/90/80mA
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
A0-A12
DECODER
8Kx8
MEMORY ARRAY
DQ0-DQ7
I/O DATA
CIRCUIT
CE#
CE2
WE#
OE#
CONTROL
CIRCUIT
COLUMN I/O
PIN DESCRIPTION
SYMBOL
A0 - A12
DQ0 – DQ7
CE#, CE2
WE#
OE#
VCC
VSS
NC
DESCRIPTION
Address Inputs
Data Inputs/Outputs
Chip Enable Inputs
Write Enable Input
Output Enable Input
Power Supply
Ground
No Connection
NOVEMBER/2009 V1.2
Alliance Memory Inc
Page 1 of 10

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AS7C164A pdf
NOVEMBER 2009
AS7C164A
8K X 8 BIT HIGH SPEED CMOS SRAM
TIMING WAVEFORMS
READ CYCLE 1 (Address Controlled) (1,2)
Address
Dout
tRC
Previous Data Valid
tAA
tOH
Data Valid
READ CYCLE 2 (CE# and CE2 and OE# Controlled) (1,3,4,5)
Address
CE#
CE2
tRC
tAA
tACE
OE#
Dout
High-Z
tOLZ
tCLZ
tOE
tOH
tOHZ
tCHZ
Data Valid
High-Z
Notes :
1.WE# is high for read cycle.
2.Device is continuously selected OE# = low, CE# = low., CE2 = high.
3.Address must be valid prior to or coincident with CE# = low, CE2 = high; otherwise tAA is the limiting parameter.
4.tCLZ, tOLZ, tCHZ and tOHZ are specified with CL = 5pF. Transition is measured ±500mV from steady state.
5.At any given temperature and voltage condition, tCHZ is less than tCLZ , tOHZ is less than tOLZ.
NOVEMBER/2009 V1.2
Alliance Memory Inc
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