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PDF ISL6263 Data sheet ( Hoja de datos )
| Número de pieza | ISL6263 | |
| Descripción | 5-Bit VID Single-Phase Voltage Regulator | |
| Fabricantes | Intersil Corporation | |
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®
Data Sheet
June 10, 2010
ISL6263
FN9213.2
5-Bit VID Single-Phase Voltage Regulator
for IMVP-6+ Santa Rosa GPU Core
The ISL6263 IC is a Single-Phase Synchronous-Buck PWM
voltage regulator featuring Intersil’s Robust Ripple Regulator
(R3) Technology™. The ISL6263 is an implementation of the
Intel® Mobile Voltage Positioning (IMVP) protocol for GPU
Render Engine core power. Integrated MOSFET drivers,
bootstrap diode, and droop amplifier result in lower
component cost and smaller implementation area.
Intersil’s R3 Technology™ combines the best features of
both fixed-frequency PWM and hysteretic PWM, delivering
excellent light-load efficiency and superior load transient
response by commanding variable switching frequency
during the transitory event.
To maximize light load efficiency, the ISL6263 automatically
transitions between continuous-conduction-mode (CCM)
and discontinuous-conduction-mode (DCM.) During DCM
the low-side MOSFET enters diode-emulation-mode (DEM.)
DEM is enabled whenever a Render Suspend state has
been set on the VID inputs. Optionally, DEM can be enabled
for all VID states by setting the FDE pin high. The ISL6263
has an audio filter that can be enabled in any Render
Suspend state by pulling the AF_EN pin high. The audio
filter prevents the PWM switching frequency from entering
the audible spectrum due to extremely light load while in
DEM.
The Render core voltage can be dynamically programmed
from 0.41200V to 1.28750V by the five VID input pins
without requiring sequential stepping of the VID states. The
ISL6263 uses the same capacitor for the soft-start slew-rate
and for the dynamic VID slew-rate by internally connecting
the SOFT pin to the appropriate current source. Processor
socket Kelvin sensing is accomplished with an integrated
unity-gain true differential amplifier.
Features
• Precision single-phase core voltage regulator
- 0.5% system accuracy 0°C to +100°C
- Differential remote GPU die voltage sensing
- Differential droop voltage sensing
• Applications up to 25A
• Input voltage range: +5.0V to +25.0V
• Programmable PWM frequency: 200kHz to 500kHz
• Pre-biased output start-up capability
• 5-bit voltage identification input (VID)
- 1.28750 to 0.41200V
- 25.75mV steps
- Sequential or non-sequential VID change on-the-fly
• Selectable diode emulation mode
- Render Suspend mode only
- Render Performance and Render Suspend mode
• Selectable audio filter in render suspend mode
• Integrated MOSFET drivers and bootstrap diode
• Choice of current sensing schemes
- Lossless inductor DCR current sensing
- Precision resistive current sensing
• Overvoltage, undervoltage, and overcurrent protection
• Pb-free plus anneal available (RoHS compliant)
Pinout
ISL6263 (32 LD 5x5 QFN)
TOP VIEW
32 31 30 29 28 27 26 25
RBIAS 1
24 VID1
SOFT 2
23 VID0
OCSET 3
22 PVCC
VW 4
COMP 5
GND PAD
(BOTTOM)
21 LGATE
20 PGND
FB 6
19 PHASE
VDIFF 7
18 UGATE
VSEN 8
17 BOOT
9 10 11 12 13 14 15 16
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006, 2010. All Rights Reserved. R3 Technology™ is a trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6263
Simplified Application Circuit for Resistive Current Sensing
RVDD
CVDD
RRBIAS
CSOFT
RI2UA
VDD
RBIAS
SOFT
I2UA
PVCC
VIN
UGATE
BOOT
V5V
CPVCC
QHS
VCC_SNS
VSS_SNS
PGOOD
VID<0:4>
VR_ON
AF_EN
FDE
VSEN
RTN
PHASE
LGATE
PGND
VW
RFSET
CFSET
ISL6263
VSUM
VO
CBOOT
LOUT
RSNS
QLS
RS
CN
CCOMP1
RCOMP CCOMP2
RDIFF2
CDIFF
RDIFF1
COMP
FB
OCSET
DFB
VDIFF
VSS
DROOP
RGND
0
ROCSET RDRP1
RDRP2
CDRP
VIN
CIN
VCCGFX
COUT
FIGURE 3. ISL6263 GPU RENDER-CORE VOLTAGE REGULATOR SOLUTION WITH RESISTIVE CURRENT SENSING
5 FN9213.2
June 10, 2010
5 Page 
ISL6263
DROOP pin minus the output voltage measured at the VO
pin, is proportional to the total inductor current. This
information is used exclusively to achieve the IMVP-6+ load
line as well as the overcurrent protection. It is important to
note that this current measurement should not be confused
with the synthetic current ripple information created within
the R3 modulator.
When using inductor DCR current sensing, an NTC element
is used to compensate the positive temperature coefficient of
the copper winding thus maintaining the load-line accuracy.
Processor Socket Kelvin Voltage Sensing
The remote voltage sense input pins VSEN and RTN of the
ISL6263 are to be terminated at the die of the GPU through
connections that mate at the processor socket. (The signal
names are Vcc_sense and Vss_sense respectively.) Kelvin
sensing allows the voltage regulator to tightly control the
processor voltage at the die, compensating for various
resistive voltage drops in the power delivery path.
Since the voltage feedback is sensed at the processor die,
removing the GPU will open the voltage feedback path of the
regulator, causing the output voltage to rise towards VIN.
The ISL6263 will shut down when the voltage between the
VO and VSS pins exceeds the severe overvoltage protection
threshold VOVPS of 1.55V. To prevent this issue from
occurring, it is recommended to install resistors Ropn1 and
Ropn2 as shown in Figure 5. These resistors provide voltage
feedback from the regulator local output in the absence of
the GPU. These resistors should be in the range of 20Ω to
100Ω.
+
Σ
+
VDIFF
VDD
−
OCP
+
+
−
10µA ↓
OCSET
+
DROOP
−
VSUM
DFB
DROOP
VO
VSEN
+
RTN
−
ROCSET
PHASE
RS
CFILTER1
RFILTER1
RFILTER2
CFILTER2
CFILTER3
LOUT
DCR
COUT
ESR
VCC_SNS
VSS_SNS
To
Processor
Socket
Kelvin
Connections
FIGURE 5. SIMPLIFIED VOLTAGE DROOP CIRCUIT WITH GPU SOCKET KELVIN SENSING AND INDUCTOR DCR CURRENT SENSING
High Efficiency Diode Emulation Mode
The ISL6263 operates in continuous-conduction-mode
(CCM) during heavy load for minimum conduction loss by
forcing the low-side MOSFET to operate as a synchronous
rectifier. Depending upon the VID and FDE pin states, an
improvement in light-load efficiency can be achieved by
operating in discontinuous-conduction-mode (DCM) where
the low-side MOSFET is operated in diode-emulation-mode
(DEM), forcing the low-side MOSFET to block negative
inductor current flow.
Positive-going inductor current flows from either the source
of the high-side MOSFET, or the drain of the low-side
MOSFET. Negative-going inductor current flows into the
source of the high-side MOSFET, or the drain of the low-side
MOSFET. When the low-side MOSFET conducts positive
inductor current, the phase voltage will be negative with
respect to the VSS pin. Conversely, when the low-side
MOSFET conducts negative inductor current, the phase
voltage will be positive with respect to the VSS pin. Negative
inductor current occurs in CCM when the output load current
is less than ½ the inductor ripple current. Sinking negative
inductor through the low-side MOSFET lowers efficiency
through unnecessary conduction losses. Upon entering
DEM the PWM switching frequency is automatically shifted
downward by an increase of the window voltage VW of 33%.
The PWM switching frequency will continue to decrease as
the load continues to decrease. The reduction of PWM
11 FN9213.2
June 10, 2010
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet ISL6263.PDF ] | |
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