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PDF MT41K1G8 Data sheet ( Hoja de datos )
| Número de pieza | MT41K1G8 | |
| Descripción | TwinDie 1.35V DDR3L SDRAM | |
| Fabricantes | Micron Technology | |
| Logotipo |  |
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Preliminary‡
8Gb: x4, x8 TwinDie DDR3L SDRAM
Description
TwinDie™ 1.35V DDR3L SDRAM
MT41K2G4 – 128 Meg x 4 x 8 Banks x 2 Ranks
MT41K1G8 – 64 Meg x 8 x 8 Banks x 2 Ranks
Description
The 8Gb (TwinDie™) DDR3L SDRAM (1.35V) uses
Micron’s 4Gb DDR3L SDRAM die (essentially two
ranks of the 4Gb DDR3L SDRAM). Refer to Micron’s
4Gb DDR3 SDRAM data sheet for the specifications
not included in this document. Specifications for base
part number MT41K1G4 correlate to TwinDie manu-
facturing part number MT41K2G4; specifications for
base part number MT41K512M8 correlate to TwinDie
manufacturing part number MT41K1G8.
Features
• Uses 4Gb Micron die
• Two ranks (includes dual CS#, ODT, CKE, and ZQ
balls)
• Each rank has eight internal banks for concurrent
operation
• VDD = VDDQ = 1.35V (1.283–1.45V); backward com-
patible to VDD = VDDQ = 1.5V ±0.075V
• 1.35V center-terminated push/pull I/O
• JEDEC-standard ball-out
• Low-profile package
• TC of 0°C to 95°C
– 0°C to 85°C: 8192 refresh cycles in 64ms
– 85°C to 95°C: 8192 refresh cycles in 32ms
– Industrial temperature (IT) available (Rev. E)
Options
• Configuration
– 128 Meg x 4 x 8 banks x 2 ranks
– 64 Meg x 8 x 8 banks x 2 ranks
• FBGA package (Pb-free)
– 78-ball FBGA
(10.5mm x 12mm x 1.2mm) Die
Rev :D
– 78-ball FBGA
(9.5mm x 11.5mm x 1.2mm) Die
Rev :E
• Timing – cycle time1
– 1.071ns @ CL = 13 (DDR3L-1866)
– 1.25ns @ CL = 11 (DDR3L-1600)
– 1.5ns @ CL = 9 (DDR3L-1333)
– 1.87ns @ CL = 7 (DDR3L-1066)
• Self refresh
– Standard
• Operating temperature
– Commercial (0°C ≤ TC ≤ 95°C)
– Industrial (-40°C ≤ TC ≤ 95°C) Rev. E
• Revision
Marking
2G4
1G8
THE
TRF
-107
-125
-15E
-187E
None
None
IT
:D/:E
Note: 1. CL = CAS (READ) latency.
Table 1: Key Timing Parameters
Speed Grade
-1071, 2, 3
-1251, 2
-15E1
-187E
Data Rate (MT/s)
1866
1600
1333
1066
Target tRCD-tRP-CL
13-13-13
11-11-11
9-9-9
7-7-7
Notes:
1. Backward compatible to 1066, CL = 7 (-187E).
2. Backward compatible to 1333, CL = 9 (-15E).
3. Backward compatible to 1600, CL = 11 (-125).
tRCD (ns)
13.91
13.75
13.5
13.1
tRP (ns)
13.91
13.75
13.5
13.1
CL (ns)
13.91
13.75
13.5
13.1
PDF: 09005aef84787542
DDR3L_8Gb_x4_x8_2CS_TwinDie_V70S_V80A.pdf - Rev. D 02/13 EN
1 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.
‡Products and specifications discussed herein are for evaluation and reference purposes only and are subject to change by
Micron without notice. Products are only warranted by Micron to meet Micron’s production data sheet specifications.
1 page  
Preliminary
8Gb: x4, x8 TwinDie DDR3L SDRAM
Ball Assignments and Descriptions
Table 3: FBGA 78-Ball Descriptions (Continued)
Symbol
DQ[7:0]
DQS, DQS#
TDQS, TDQS#
VDD
VDDQ
VREFCA
VREFDQ
VSS
VSSQ
ZQ[1:0]
NC
NF
Type
I/O
I/O
I/O
Supply
Supply
Supply
Supply
Supply
Supply
Reference
–
–
Description
Data input/output: Bidirectional data bus for x8 configuration. DQ[7:0] are referenced
to VREFDQ.
Data strobe: DQS and DQS# are differential data strobes: Output with read data; edge
aligned with read data; input with write data; center-aligned with write data.
Termination data strobe: Applies to the x8 configuration only. When TDQS is enabled,
DM is disabled, and the TDQS and TDQS# balls provide termination resistance.
Power supply: 1.35V (1.283V to 1.45V operational; compatible with 1.5V operation)
DQ power supply: 1.35V (1.283V to 1.45V operational; compatible with 1.5V opera-
tion). Isolated on the device for improved noise immunity.
Reference voltage for control, command, and address: VREFCA must be maintained
at all times (including self refresh) for proper device operation.
Reference voltage for data: VREFDQ must be maintained at all times (including self re-
fresh) for proper device operation.
Ground.
DQ ground: Isolated on the device for improved noise immunity.
External reference ball for output drive calibration: This ball is tied to an external
240Ω resistor (RZQ), which is tied to VSSQ.
No connect: These balls should be left unconnected (the ball has no connection to the
DRAM or to other balls).
No function: When configured as a x4 device, these balls are NF. When configured as a
x8 device, these balls are defined as TDQS#, DQ[7:4].
PDF: 09005aef84787542
DDR3L_8Gb_x4_x8_2CS_TwinDie_V70S_V80A.pdf - Rev. D 02/13 EN
5 Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.
5 Page 
Preliminary
8Gb: x4, x8 TwinDie DDR3L SDRAM
Electrical Specifications – ICDD Parameters
Table 8: DDR3L ICDD Specifications and Conditions (Rev E)
Note 1 applies to the entire table
Combined
Individual
Symbol
Die Status
ICDD0
ICDD1
ICDD0 =
IDD0 + IDD2P0 + 5
ICDD1 =
IDD1 + IDD2P0 + 5
ICDD2P0 (slow exit)
ICDD2P1 (fast exit)
ICDD2Q
ICDD2N
ICDD2N T
ICDD3P
ICDD3N
ICDD4R
ICDD2P0 =
IDD2P0 + IDD2P0
ICDD2P1 =
IDD2P1 + IDD2P0
ICDD2Q =
IDD2Q + IDD2P0
ICDD2N =
IDD2N + IDD2P0
ICDD2NT =
IDD2NT + IDD2P0
ICDD3P = IDD3P +
IDD2P0
ICDD3N =
IDD3N + IDD2P0
ICDD4RCDD4R =
IDD4R + IDD2P0 + 5
ICDD4W
ICDD4W =
IDD4W + IDD2P0 + 5
ICDD5B
ICDD6
ICDD6ET
ICDD7
ICDD8
ICDD5B =
IDD5B + IDD2P0
ICDD6 =
IDD6 + IDD6
ICDD6ET =
IDD6ET + IDD6ET
ICDD7 =
IDD7 + IDD2P0 + 5
ICDD8 = 2 × IDD2P0
+4
Bus
Width
x4, x8
x4
x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
x4
x8
x4
x8
x4, x8
x4, x8
x4, x8
x4, x8
x4, x8
-187E
67
76
82
36
44
45
46
50
50
50
136
146
110
118
162
40
50
183
40
-15E
70
80
85
36
46
46
47
53
53
53
153
163
126
133
166
40
50
213
40
-125
78
84
89
36
50
50
50
57
56
56
170
180
141
148
173
40
50
243
40
-107
85
88
93
36
55
53
53
60
59
59
187
197
156
164
180
40
50
274
40
Units
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Note: 1. ICDD values reflect the combined current of both individual die. IDDx represents individu-
al die values.
PDF: 09005aef84787542
DDR3L_8Gb_x4_x8_2CS_TwinDie_V70S_V80A.pdf - Rev. D 02/13 EN
11
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2011 Micron Technology, Inc. All rights reserved.
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet MT41K1G8.PDF ] | |
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