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PDF ADA4817-2 Data sheet ( Hoja de datos )
| Número de pieza | ADA4817-2 | |
| Descripción | FastFET Op Amps | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
FEATURES
High speed
−3 dB bandwidth (G = 1, RL = 100 Ω): 1050 MHz
Slew rate: 870 V/µs
0.1% settling time: 9 ns
Low input bias current: 2 pA
Low input capacitance
Common-mode capacitance: 1.3 pF
Differential-mode capacitance: 0.1 pF
Low noise
4 nV/√Hz @ 100 kHz
2.5 fA/√Hz @ 100 kHz
Low distortion
−90 dBc @ 10 MHz (G = 1, RL = 1 kΩ)
Offset voltage: 2 mV maximum
High output current: 40 mA
Supply current per amplifier: 19 mA
Power-down supply current per amplifier: 1.5 mA
APPLICATIONS
Photodiode amplifiers
Data acquisition front ends
Instrumentation
Filters
ADC drivers
CCD output buffers
Low Noise, 1 GHz
FastFET Op Amps
ADA4817-1/ADA4817-2
CONNECTION DIAGRAMS
ADA4817-1
TOP VIEW
(Not to Scale)
PD 1
FB 2
–IN 3
+IN 4
8 +VS
7 OUT
6 NC
5 –VS
NC = NO CONNECT
Figure 1. 8-Lead LFCSP (CP-8-2)
ADA4817-1
TOP VIEW
(Not to Scale)
FB 1
–IN 2
+IN 3
–VS 4
8 PD
7 +VS
6 OUT
5 NC
NC = NO CONNECT
Figure 2. 8-Lead SOIC (RD-8-1)
ADA4817-2
TOP VIEW
(Not to Scale)
–IN1 1
+IN1 2
NC 3
–VS2 4
12 –VS1
11 NC
10 +IN2
9 –IN2
GENERAL DESCRIPTION
The ADA4817-1 (single) and ADA4817-2 (dual) FastFET™
amplifiers are unity-gain stable, ultrahigh speed voltage
feedback amplifiers with FET inputs. These amplifiers were
developed with the Analog Devices, Inc., proprietary eXtra Fast
Complementary Bipolar (XFCB) process, which allows the
amplifiers to achieve ultralow noise (4 nV/√Hz; 2.5 fA/√Hz)
as well as very high input impedances.
With 1.3 pF of input capacitance, low noise (4 nV/√Hz), low
offset voltage (2 mV maximum), and 1050 MHz −3 dB band-
width, the ADA4817-1/ADA4871-2 are ideal for data acquisition
front ends as well as wideband transimpedance applications,
such as photodiode preamps.
Rev. B
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
NC = NO CONNECT
Figure 3. 16-Lead LFCSP (CP-16-20)
With a wide supply voltage range from 5 V to 10 V and the
ability to operate on either single or dual supplies, the
ADA4817-1/ ADA4817-2 are designed to work in a variety of
applications including active filtering and ADC driving.
The ADA4817-1 is available in a 3 mm × 3 mm, 8-lead LFCSP and
8-lead SOIC, and the ADA4817-2 is available in a 4 mm × 4 mm,
16-lead LFCSP. These packages feature a low distortion pinout
that improves second harmonic distortion and simplifies circuit
board layout. They also feature an exposed paddle that provides a
low thermal resistance path to the printed circuit board (PCB).
This enables more efficient heat transfer and increases reliability.
These products are rated to work over the extended industrial
temperature range (−40°C to +105°C).
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2008–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
Data Sheet
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Supply Voltage
Power Dissipation
Common-Mode Input Voltage
Differential Input Voltage
Storage Temperature Range
Operating Temperature Range
Lead Temperature (Soldering, 10 sec)
Junction Temperature
Rating
10.6 V
See Figure 4
−VS − 0.5 V to +VS + 0.5 V
±VS
−65°C to +125°C
−40°C to +105°C
300°C
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the worst-case conditions, that is, θJA is
specified for a device soldered in the circuit board for the
surface-mount packages.
Table 4.
Package Type
θJA θJC Unit
LFCSP_VD (ADA4817-1)
94
29 °C/W
SOIC_N_EP (ADA4817-1)
79
29 °C/W
LFCSP_WQ (ADA4817-2)
64
14 °C/W
MAXIMUM SAFE POWER DISSIPATION
The maximum safe power dissipation for the ADA4817-1/
ADA4817-2 are limited by the associated rise in junction
temperature (TJ) on the die. At approximately 150°C (which is
the glass transition temperature), the properties of the plastic
change. Even temporarily exceeding this temperature limit may
change the stresses that the package exerts on the die, permanently
shifting the parametric performance of the ADA4817-x. Exceeding
a junction temperature of 175°C for an extended period can result
in changes in silicon devices, potentially causing degradation or
loss of functionality.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
die due to the ADA4817-1/ADA4817-2 drive at the output.
The quiescent power is the voltage between the supply pins (VS)
multiplied by the quiescent current (IS).
ADA4817-1/ADA4817-2
PD = Quiescent Power + (Total Drive Power – Load Power) (1)
( )PD = VS × IS
+
VS
2
×
VOUT
RL
–
VOUT 2
RL
(2)
Consider RMS output voltages. If RL is referenced to −VS, as
in single-supply operation, the total drive power is VS × IOUT. If
the rms signal levels are indeterminate, consider the worst-case
scenario, when VOUT = VS/4 for RL to midsupply.
PD
=
(VS
×
IS
)+
(VS /4 )2
RL
(3)
In single-supply operation with RL referenced to −VS, the worst-
case situation is VOUT = VS/2.
Airflow increases heat dissipation, effectively reducing θJA.
More metal directly in contact with the package leads and
exposed paddle from metal traces, throughholes, ground,
and power planes also reduces θJA.
Figure 4 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the exposed paddle
LFCSP_VD (single 94°C/W), SOIC_N_EP (single 79°C/W)
and LFCSP_WQ (dual 64°C/W) package on a JEDEC standard
4-layer board. θJA values are approximations.
3.5
3.0
ADA4817-2, LFCSP
2.5
ADA4817-1, SOIC
2.0
1.5
ADA4817-1, LFCSP
1.0
0.5
0
–40 –30 –20 –10 0 10 20 30 40 50 60 70 80 90 100
AMBIENT TEMPERATURE (°C)
Figure 4. Maximum Safe Power Dissipation vs. Ambient Temperature for
a 4-Layer Board
ESD CAUTION
Rev. B | Page 5 of 28
5 Page 
Data Sheet
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
100k
–PSRR
+PSRR
1M 10M 100M
FREQUENCY (Hz)
Figure 26. PSRR vs. Frequency
–20
–25
–30
–35
–40
–45
–50
–55
–60
–65
–70
–75
–80
–85
–90
–95
–100
100k
100
1M 10M 100M
FREQUENCY (Hz)
Figure 27. CMRR vs. Frequency
1G
1G
10
1
0.1
0.01
100k
1M 10M 100M
FREQUENCY (Hz)
1G
Figure 28. Output Impedance vs. Frequency
ADA4817-1/ADA4817-2
0.5
0.4
0.3
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
–40
–20 0
20 40 60 80
TEMPERATURE (°C)
Figure 29. Offset Voltage vs. Temperature
100
1000
100
10
1
10 100 1k 10k 100k 1M 10M 100M
FREQUENCY (Hz)
Figure 30. Input Voltage Noise
24
22
VS = ±5V
20
18
16
VS = +5V
14
12
10
–40
–20
0 20 40 60
TEMPERATURE (°C)
80 100
Figure 31. Quiescent Current vs. Temperature for Various Supply Voltages
Rev. B | Page 11 of 28
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet ADA4817-2.PDF ] | |
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