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PDF CEF08N2 Data sheet ( Hoja de datos )
| Número de pieza | CEF08N2 | |
| Descripción | N-Channel Logic Level Enhancement Mode Field Effect Transistor | |
| Fabricantes | CET | |
| Logotipo |  |
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CEF08N2
Nov. 2002
N-Channel Logic Level Enhancement Mode Field Effect Transistor
FEATURES
250V , 6A , RDS(ON)=450mΩ @VGS=10V.
Super high dense cell design for extremely low RDS(ON).
High power and current handling capability.
TO-220F full-pak for through hole
G
D
G
D
S
TO-220F
S
ABSOLUTE MAXIMUM RATINGS (Tc=25 C unless otherwise noted)
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
Drain Current-Continuous
-Pulsed
ID
IDM
Drain-Source Diode Forward Current
IS
Maximum Power Dissipation @Tc=25 C
Derate above 25 C
Operating and Storage Temperautre Range
PD
TJ, TSTG
Limit
250
Ć30
6
24
6
38
0.3
-50 to 150
Unit
V
V
A
A
A
W
W/ C
C
THERMAL CHARACTERISTICS
Thermal Resistance, Junction-to-Case
Thermal Resistance, Junction-to-Ambient
RįJC
RįJA
3.3
65
C/W
C/W
1
1 page  
CEF08N2
VDD
RL
VIN
D VOUT
VGS
RGEN G
S
Figure 11. Switching Test Circuit
td(on)
VOUT
t on
tr
td(off)
90%
10% INVERTED
toff
tf
90%
10%
VIN
10%
50%
90%
50%
PULSE WIDTH
Figure 12. Switching Waveforms
10 0
D=0.5
0.2
10-1 0.1
0.05
0.02
0.01
10-2
Single Pulse
10-3
10-5
10-4
10-3
10-2
10-1
Square Wave Pulse Duration (sec)
PDM
t1
t2
1. RįJC (t)=r (t) * RįJC
2. RįJC=See Datasheet
3. TJM-TC = P* RįJC (t)
4. Duty Cycle, D=t1/t2
0
10
Figure 13. Normalized Thermal Transient Impedance Curve
10 1
5
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet CEF08N2.PDF ] | |
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