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PDF NL10276BC20-08 Data sheet ( Hoja de datos )
| Número de pieza | NL10276BC20-08 | |
| Descripción | Display Module | |
| Fabricantes | NEC | |
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TFT COLOR LCD MODULE
NL10276BC20-08
26cm (10.4 Type)
XGA
LVDS Interface (1 port)
DATA SHEET
DOD-MD-0097 (1st edition)
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-MD-0097 (1st edition)
Published date: June 2006 CP(N)
1 © NEC LCD Technologies, Ltd.
2006 All rights reserved.
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NL10276BC20-08
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
Backlight
Power consumption
210.432 (H) × 157.824 (V) mm
26 cm (10.4 inches)
a-Si TFT active matrix
262,144 colors (6-bit)
1,024 (H) × 768 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.0685 (H) × 0.2055 (V) mm
0.2055 (H) × 0.2055 (V) mm
227.0 (W) × 174.5 (H) × 10.5 (D) mm (typ.)
440 g (typ.)
700:1 (typ.)
At the contrast ratio ≥10:1
• Horizontal: Right side 85° (typ.), Left side 85° (typ.)
• Vertical: Up side 85° (typ.), Down side 85° (typ.)
At DPS = Low or Open: Normal scan
• Viewing angle with optimum grayscale (γ=2.2): normal axis
Clear
3H (min.) [by JIS K5400]
At LCD panel center
40 % (typ.) [against NTSC color space]
Ton+Toff (10%←→ 90%)
25 ms (typ.)
At IBL= 5.0mArms / lamp
300 cd/m2 (typ.)
LVDS interface (1port)
6-bit digital signals for data of RGB colors,
Dot clock (CLK), Data enable (DE)
LCD panel signal processing board: 3.3V
Edge light type: 2 cold cathode fluorescent lamps
Replaceable parts
• Lamp holder set: Type No. 104LHS44
Recommended inverter (Option)
• Inverter: Type No. 104PW191
At IBL= 5.0mArms / lamp, Checkered flag pattern
6.7 W (typ., Power dissipation of the inverter is not included.)
DATA SHEET DOD-MD-0097(1st edition)
5
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4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
0V
ON
3.0V
10µs≤ Tr < 50ms
Display signals*
Function signals
Note2
0V
0ms < t < 35ms
VALID period
NL10276BC20-08
OFF
ON
0.3V
Toff ≥ 50ms
0ms < t < 35ms
* These signals should be measured at the terminal of 100Ω resistance.
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V, a protection
circuit may work, and then this product may not work.
Note2: Display signals (D0+/-, D1+/-, D2+/- and CK+/-) and function signal (DPS) must be Low or
High-impedance, exclude the VALID period (See above sequence diagram), in order to avoid
that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. If customer stops the
display and function signals, they should be cut VCC.
4.4.2 Backlight inverter (Option)
Display and
function signals
Note1
Note2
VALID period
VDDB
Note1: These are display and function signals for LCD panel signal processing board.
Note2: The backlight inverter voltage (VDDB) should be inputted within the valid period of display
and function signals, in order to avoid unstable data display.
DATA SHEET DOD-MD-0097(1st edition)
11
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