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PDF STM32F103RC Data sheet ( Hoja de datos )
| Número de pieza | STM32F103RC | |
| Descripción | ARM-based 32-bit MCU | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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STM32F103xC, STM32F103xD,
STM32F103xE
High-density performance line ARM®-based 32-bit MCU with 256 to 512KB
Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces
Datasheet −production data
Features
• Core: ARM® 32-bit Cortex®-M3 CPU
– 72 MHz maximum frequency, 1.25 DMIPS/MHz
(Dhrystone 2.1) performance at 0 wait state
memory access
– Single-cycle multiplication and hardware
division
• Memories
– 256 to 512 Kbytes of Flash memory
– up to 64 Kbytes of SRAM
– Flexible static memory controller with 4 Chip
Select. Supports Compact Flash, SRAM,
PSRAM, NOR and NAND memories
– LCD parallel interface, 8080/6800 modes
• Clock, reset and supply management
– 2.0 to 3.6 V application supply and I/Os
– POR, PDR, and programmable voltage detector
(PVD)
– 4-to-16 MHz crystal oscillator
– Internal 8 MHz factory-trimmed RC
– Internal 40 kHz RC with calibration
– 32 kHz oscillator for RTC with calibration
• Low power
– Sleep, Stop and Standby modes
– VBAT supply for RTC and backup registers
• 3 × 12-bit, 1 µs A/D converters (up to 21
channels)
– Conversion range: 0 to 3.6 V
– Triple-sample and hold capability
– Temperature sensor
• 2 × 12-bit D/A converters
• DMA: 12-channel DMA controller
– Supported peripherals: timers, ADCs, DAC,
SDIO, I2Ss, SPIs, I2Cs and USARTs
• Debug mode
– Serial wire debug (SWD) & JTAG interfaces
– Cortex®-M3 Embedded Trace Macrocell™
• Up to 112 fast I/O ports
– 51/80/112 I/Os, all mappable on 16 external
interrupt vectors and almost all 5 V-tolerant
LQFP64 10 × 10 mm,
LQFP100 14 × 14 mm,
LQFP144 20 × 20 mm
WLCSP64
LFBGA100 10 × 10 mm
LFBGA144 10 × 10 mm
• Up to 11 timers
– Up to four 16-bit timers, each with up to 4
IC/OC/PWM or pulse counter and quadrature
(incremental) encoder input
– 2 × 16-bit motor control PWM timers with dead-
time generation and emergency stop
– 2 × watchdog timers (Independent and Window)
– SysTick timer: a 24-bit downcounter
– 2 × 16-bit basic timers to drive the DAC
• Up to 13 communication interfaces
– Up to 2 × I2C interfaces (SMBus/PMBus)
– Up to 5 USARTs (ISO 7816 interface, LIN, IrDA
capability, modem control)
– Up to 3 SPIs (18 Mbit/s), 2 with I2S interface
multiplexed
– CAN interface (2.0B Active)
– USB 2.0 full speed interface
– SDIO interface
• CRC calculation unit, 96-bit unique ID
• ECOPACK® packages
Reference
Table 1.Device summary
Part number
STM32F103xC
STM32F103RC STM32F103VC
STM32F103ZC
STM32F103xD
STM32F103RD STM32F103VD
STM32F103ZD
STM32F103xE
STM32F103RE STM32F103ZE
STM32F103VE
November 2015
This is information on a product in full production.
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STM32F103xC, STM32F103xD, STM32F103xE
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
Table 13.
Table 14.
Table 15.
Table 16.
Table 17.
Table 18.
Table 19.
Table 20.
Table 21.
Table 22.
Table 23.
Table 24.
Table 25.
Table 26.
Table 27.
Table 28.
Table 29.
Table 30.
Table 31.
Table 32.
Table 33.
Table 34.
Table 35.
Table 36.
Table 37.
Table 38.
Table 39.
Table 40.
Table 41.
Table 42.
Table 43.
Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
STM32F103xC, STM32F103xD and STM32F103xE features
and peripheral counts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
STM32F103xx family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
High-density timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
High-density STM32F103xC/D/E pin definitions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
FSMC pin definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Operating conditions at power-up / power-down . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 45
Embedded internal reference voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Maximum current consumption in Run mode, code with data processing
running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Maximum current consumption in Run mode, code with data processing
running from RAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Maximum current consumption in Sleep mode, code running from Flash or RAM. . . . . . . 49
Typical and maximum current consumptions in Stop and Standby modes . . . . . . . . . . . . 50
Typical current consumption in Run mode, code with data processing
running from Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Typical current consumption in Sleep mode, code running from Flash or
RAM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
High-speed external user clock characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Low-speed external user clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
HSE 4-16 MHz oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
LSE oscillator characteristics (fLSE = 32.768 kHz) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Low-power mode wakeup timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
PLL characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Flash memory characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Flash memory endurance and data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
Asynchronous non-multiplexed SRAM/PSRAM/NOR read timings . . . . . . . . . . . . . . . . . . 67
Asynchronous non-multiplexed SRAM/PSRAM/NOR write timings . . . . . . . . . . . . . . . . . . 68
Asynchronous multiplexed PSRAM/NOR read timings. . . . . . . . . . . . . . . . . . . . . . . . . . . . 69
Asynchronous multiplexed PSRAM/NOR write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Synchronous multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
Synchronous multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 75
Synchronous non-multiplexed NOR/PSRAM read timings . . . . . . . . . . . . . . . . . . . . . . . . . 76
Synchronous non-multiplexed PSRAM write timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77
Switching characteristics for PC Card/CF read and write cycles . . . . . . . . . . . . . . . . . . . . 82
Switching characteristics for NAND Flash read and write cycles . . . . . . . . . . . . . . . . . . . . 86
EMS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
EMI characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
ESD absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
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STM32F103xC, STM32F103xD, STM32F103xE
Description
2.1
Device overview
The STM32F103xC/D/E high-density performance line family offers devices in six different
package types: from 64 pins to 144 pins. Depending on the device chosen, different sets of
peripherals are included, the description below gives an overview of the complete range of
peripherals proposed in this family.
Figure 1 shows the general block diagram of the device family.
Table 2. STM32F103xC, STM32F103xD and STM32F103xE features
and peripheral counts
Peripherals
STM32F103Rx
STM32F103Vx
STM32F103Zx
Flash memory in Kbytes
SRAM in Kbytes
FSMC
General-purpose
Timers Advanced-control
Basic
SPI(I2S)(3)
I2C
USART
Comm
USB
CAN
SDIO
GPIOs
12-bit ADC
Number of channels
12-bit DAC
Number of channels
CPU frequency
Operating voltage
Operating temperatures
Package
256 384 512 256 384 512 256 384 512
48
64(1)
48
64
48
64
No
Yes(2)
Yes
4
2
2
3(2)
2
5
1
1
1
51 80 112
3 33
16 16 21
2
2
72 MHz
2.0 to 3.6 V
Ambient temperatures: –40 to +85 °C /–40 to +105 °C (see Table 10)
Junction temperature: –40 to + 125 °C (see Table 10)
LQFP64, WLCSP64 LQFP100, BGA100 LQFP144, BGA144
1. 64 KB RAM for 256 KB Flash are available on devices delivered in CSP packages only.
2. For the LQFP100 and BGA100 packages, only FSMC Bank1 and Bank2 are available. Bank1 can only
support a multiplexed NOR/PSRAM memory using the NE1 Chip Select. Bank2 can only support a 16- or
8-bit NAND Flash memory using the NCE2 Chip Select. The interrupt line cannot be used since Port G is
not available in this package.
3.
IT2hSeaSuPdIio2
and SPI3
mode.
interfaces
give
the
flexibility
to
work
in
an
exclusive
way
in
either
the
SPI
mode
or
the
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet STM32F103RC.PDF ] | |
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