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PDF SPMC65P2202A Data sheet ( Hoja de datos )
| Número de pieza | SPMC65P2202A | |
| Descripción | Micro Controllers | |
| Fabricantes | Sunplus | |
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SPMC65P2204A/2202A
Micro-Controllers (OTP) With ADC
MAY. 15, 2006
Version 1.1
Sunplus Technology reserves the right to change this documentation without prior notice. Information provided by Sunplus Technology is believed to be
accurate and reliable. However, Sunplus Technology makes no warranty for any errors which may appear in this document. Contact Sunplus Technology to
obtain the latest version of device specifications before placing your order. No responsibility is assumed by Sunplus Technology for any infringement of patent
or other rights of third parties which may result from its use. In addition, Sunplus products are not authorized for use as critical components in life support
devices/ systems or aviation devices/systems, where a malfunction or failure of the product may reasonably be expected to result in significant injury to the
programmer, without the express written approval of Sunplus.
1 page  
3.BLOCK DIAGRAM
XI/RC/ECLK
XO
OSC
circuit
Power
saving
controller
RAM
(IRQ1,IRQ0)PB[5:4]
Interrupt Management
RESETB
VDD
VSS
RESET Management
Low Voltage Reset
25KHZ (RC Oscillator)
Watch-Dog Timer
SPMC65P2204A/2202A
SPMC65 CPU
OTP ROM
Time Base
Buzzer output
PORT B6
8 bit Timer-0 CC
PORT B0
16 bit Timer-1 CCP(16 bit)
PORT B1,3
9-channel 10-bit ADC
PORT A[7:0]
PB6(BUZ)
PB0(TC0)
PB1(TC1)
PB3(COMP1/PWM1)
(AN8\AVref)PB7
(AN[7:0])PA[7:0]
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
5
MAY. 15, 2006
Version: 1.1
5 Page 
SPMC65P2204A/2202A
$0000
$005F
$0060
96 Bytes
Hardware Register
160 Bytes
$00FF
$0100
RAM
$01DF
$01E0
$01FF
$0200
$7FDF
$7FE0
$7FE3
$7FF0
$7FFF
$8000
Reserved
32 Bytes
RAM
Reserved
4 Bytes
Device Configuration Registers
Reserved
16 Bytes
User Information
$EFFF
$F000
Reserved
$FFF9
$FFFA
$FFFF
4K Bytes
Program Memory
6 Bytes
Exception Vector
Figure 5.2-2 Memory map for SPMC65P2204A
$0000
$005F
$0060
96 Bytes
Hardware Register
160 Bytes
$00FF
$0100
RAM
$01DF
$01E0
$01FF
$0200
Reserved
32 Bytes
RAM
$7FDF
$7FE0
$7FE3
$7FF0
$7FFF
$8000
Reserved
4 Bytes
Device Configuration Registers
Reserved
16 Bytes
User Information
Reserved
$F7FF
$F800
$FFF9
$FFFA
$FFFF
2K Bytes
Program Memory
6 Bytes
Exception Vector
Figure 5.2-3 Memory map for SPMC65P2202A
5.2.3. Hardware Control Registers
SPMC65P2204A/2202A device have up to twenty control registers.
All of the control registers are used by MCU and peripheral
function block for controlling the desired operation of the device.
Some of the control registers contain control and statue bits for
peripheral module such as Timer unit, A/D Converter, etc. Note
that the reserved address can’t be implemented on the chip. Some
of bits in control register are read only, so write to those bits don't
have any effect on corresponding bits. The following table shows
the summary of the control registers. The detailed information of
each control registers are explained in each peripheral section.
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
11
MAY. 15, 2006
Version: 1.1
11 Page | ||
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| PDF Descargar | [ Datasheet SPMC65P2202A.PDF ] | |
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