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PDF NL8048BC24-04 Data sheet ( Hoja de datos )
| Número de pieza | NL8048BC24-04 | |
| Descripción | TFT COLOR LCD MODULE | |
| Fabricantes | NEC | |
| Logotipo |  |
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TFT COLOR LCD MODULE
NL8048BC24-04
23cm (9.0 Type)
WVGA
LVDS interface (1port)
DATA SHEET
DOD-PP-0884 (2nd edition)
This DATA SHEET is updated document from
DOD-PP-0824(1).
All information is subject to change without notice.
Please confirm the sales representative before
starting to design your system.
Document Number: DOD-PP-0884 (1st edition)
Published date: October 2009 CP(N)
1 © NEC LCD Technologies, Ltd.
2009 All rights reserved.
1 page  
NL8048BC24-04
2. GENERAL SPECIFICATIONS
Display area
Diagonal size of display
Drive system
Display color
Pixel
Pixel arrangement
Dot pitch
Pixel pitch
Module size
Weight
Contrast ratio
Viewing angle
Designed viewing direction
Polarizer surface
Polarizer pencil-hardness
Color gamut
Response time
Luminance
Signal system
Power supply voltage
196.8 (H) × 118.08 (V) mm
23cm (9.0 inches)
a-Si TFT active matrix
16,777,216 colors (At 8-bit input, FRC terminal= High)
262,144 colors (At 6-bit input, FRC terminal= Low or Open)
800 (H) × 480 (V) pixels
RGB (Red dot, Green dot, Blue dot) vertical stripe
0.082 (H) × 0.246 (V) mm
0.246 (H) × 0.246 (V) mm
220.5 (W) × 136.5 (H) × 10.5 (D) mm (typ.)
365g (typ.)
800:1 (typ.)
At the contrast ratio ≥10:1
• Horizontal: Right side 88° (typ.), Left side 88° (typ.)
• Vertical: Up side 88° (typ.), Down side 88° (typ.)
At DPS= Low or open: Normal scan
• Viewing angle with optimum grayscale (γ≒ 2.2): Normal axis
(perpendicular)
Clear
3H (min.) [by JIS K5400]
At LCD panel center
60% (typ.) [against NTSC color space]
Ton+Toff (10%←→ 90%)
25ms (typ.)
At IBL= 5.0mArms / lamp
350cd/m2 (typ.)
LVDS 1port
(Receiver: THC63LVDF84B, THine Electronics Inc. or equivalent)
[8bit/6bit digital signals for data of RGB colors, Dot clock (CLK),
Data enable (DE)]
LCD panel signal processing board: 3.3V
Edge light type: 2 cold cathode fluorescent lamps
Backlight
Power consumption
Replaceable part
• Lamp holder set: Type No. 90LHS03
Recommended inverter (Option)
• Inverter: Type No. 104PW201
At IBL= 5.0mArms / lamp, Checkered flag pattern
6.0 W (typ., Power dissipation of the inverter is not included.)
DATA SHEET DOD-PP-0884 (2nd edition)
5
5 Page 
4.4 POWER SUPPLY VOLTAGE SEQUENCE
4.4.1 LCD panel signal processing board
VCC
Note1
0V
ON
3.0V
10μs ≤ Tr < 50ms
Display signals*,
Function signals
Note2
0V
0ms < t < 35ms
VALID period
NL8048BC24-04
OFF ON
0.3V
Toff ≥ 50ms
0ms < t < 35ms
* These signals should be measured at the terminal of 100Ω resistance.
Note1: In terms of voltage variation (voltage drop) while VCC rising edge is below 3.0V, a protection
circuit may work, and then this product may not work.
Note2: Display signals (D0+/-, D1+/-, D2+/-, D3+/- and CLK+/-) and function signals (DPS FRC and
MSL) must be Low or High-impedance, exclude the VALID period (See above sequence
diagram), in order to avoid that internal circuits is damaged.
If some of display and function signals of this product are cut while this product is working,
even if the signal input to it once again, it might not work normally. VCC should be cut when
the display and function signals are stopped.
4.4.2 Inverter (Option)
Display signals
Function signals
Note1
Note2
VALID period
VDDB
Note1: These are the display and function signals for LCD panel signal processing board.
Note2: The backlight should be turned on within the valid period of display and function signals, in
order to avoid unstable data display.
DATA SHEET DOD-PP-0884 (2nd edition)
11
11 Page | ||
| Páginas | Total 33 Páginas | |
| PDF Descargar | [ Datasheet NL8048BC24-04.PDF ] | |
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